Trench capacitor comprises a dielectric arranged between a first capacitor electrode and a second capacitor electrode

    公开(公告)号:DE10147120A1

    公开(公告)日:2003-04-17

    申请号:DE10147120

    申请日:2001-09-25

    Abstract: Trench capacitor comprises a dielectric (23, 28) arranged between a first capacitor electrode (24) and a second capacitor electrode (16). The first capacitor electrode has a tubular structure which protrudes into a substrate (10). The second capacitor electrode has a first section (30, 32) which lies opposite the inner side of the tubular structure over the dielectric, and a second section which lies opposite the outer side of the tubular structure over the dielectric. An Independent claim is also included for a process for the production of the trench capacitor. Preferred Features: The substrate is of a first doping type. The second section of the second capacitor electrode has doped regions of a second doping type. The first section of the second capacitor electrode has a metal layer. The dielectric is made from a nitride-oxide layer sequence or an oxide-nitride-oxide layer sequence.

    35.
    发明专利
    未知

    公开(公告)号:DE10128718A1

    公开(公告)日:2003-01-02

    申请号:DE10128718

    申请日:2001-06-13

    Abstract: A memory cell has a selection transistor and a trench capacitor. An upper capacitor electrode of the trench capacitor, in the region of an insulating collar, has a metallic section, and that section of the upper electrode that makes contact with a storage dielectric is of a non-metallic form, in particular containing polysilicon. A buried strap, which connects the upper electrode to the select transistor, is of a non-metallic form, in particular formed of polysilicon.

    36.
    发明专利
    未知

    公开(公告)号:DE10109564A1

    公开(公告)日:2002-09-12

    申请号:DE10109564

    申请日:2001-02-28

    Abstract: The invention relates to a trench condenser for use in a DRAM memory cell and a method for production of said trench condenser. Said trench condenser comprises a lower condenser electrode (10), a memory dielectric (12) and an upper condenser electrode (18), at least partly arranged in a trench (5), whereby the lower condenser electrode (10) lies adjacent to a wall of the trench in the lower region of the trench, whilst in the upper region of the trench, a spacer layer (9), made from an insulating material, is provided adjacent to the wall of the trench. The upper electrode (18) comprises at least two layers (13, 14, 15), of which at least one is metallic, with the proviso that the upper electrode does not comprise two layers of which the lower is tungsten silicide and the upper doped polymeric silicon, whereby the layers (13, 14, 15) of the upper electrode run along the walls and the floor of the trench (5) at least as far as the upper edge of the spacer layer.

    38.
    发明专利
    未知

    公开(公告)号:DE19942680A1

    公开(公告)日:2001-04-05

    申请号:DE19942680

    申请日:1999-09-07

    Abstract: The capacitor is arranged on the surface of a substrate (1). A first capacitor electrode has a middle part (M) and a side part (ST),which point vertically upwards, are arranged beside each other and are connected with each other via an upper part (O) located above said middle part (M) and said side part (ST). The middle part (M) is longer than the side part (ST) and is connected with other components of the circuit arrangement located below said middle part (M) and said side part (ST). The first capacitor electrode is provided with a capacitor dielectric (KD). A second capacitor electrode (P) borders the capacitor dielectric (KD).

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