公开(公告)号：WO2004036501A8

公开(公告)日：2004-08-19

申请号：PCT/US0324152

申请日：2003-07-30

Applicant: QUALCOMM INC

Inventor： GOVINDASWAMY SENTHIL ,  LEVIN JEFFREY A ,  LAROCCA JUDITH

IPC: H04N19/124 ,  G06T9/00

CPC classification number: G06T9/005 ,  H04N19/122 ,  H04N19/124 ,  H04N19/157 ,  H04N19/176 ,  H04N19/182 ,  H04N19/61

Abstract: Apparatus and method for selecting an appropriate parameter at decompression are disclosed. In particular, when adaptive block size discrete cosine transform compression is used to compress data, different combinations of sub-blocks can be generated. To decompress the different combinations of sub-blocks, the appropriate parameter is selected based on block size assignment information and the address of data in the data block.

Abstract translation: 公开了用于在解压缩时选择适当的参数的设备和方法。 特别是，当使用自适应块大小的离散余弦变换压缩来压缩数据时，可以生成子块的不同组合。 为了对子块的不同组合进行解压缩，基于块大小分配信息和数据块中的数据的地址来选择适当的参数。

公开(公告)号：WO02093750A2

公开(公告)日：2002-11-21

申请号：PCT/US0215914

申请日：2002-05-15

Applicant: QUALCOMM INC

Inventor： LAROCCA JUDITH ,  IRVINE A CHRIS ,  LEVIN A JEFFREY

IPC: G06F15/00 ,  H03M20060101 ,  H04N1/32 ,  H04N1/41 ,  H04N7/12 ,  H03M

CPC classification number: G06F17/147 ,  H04N19/436 ,  H04N19/44 ,  H04N19/625

Abstract: An apparatus to determine the inverse transform of a block of encoded data, the block of encoded data comprising a plurality of compressed frequency domain data elements. An input register (332) is configured to receive a predetermined quantity of data elements. At least one butterfly processor (364) is coupled to the input register and is configured to perform at least one mathematical operation on selected pairs of data elements to produce an output of processed data elements. At least one intermediate register (340) is coupled to the butterfly processor and configured to temporarily store the processed data. A feedback loop is coupled to the intermediate register and the butterfly processor, and if enabled, is configured to transfer a first portion of processed data elements to the appropriate butterfly processor to perform additional mathematical operations and where if disabled, is configured to transfer a second portion of processed data elements to at least one holding register.

Abstract translation: 一种用于确定编码数据块的逆变换的装置，所述编码数据块包括多个压缩频域数据元素。 输入寄存器（332）被配置为接收预定量的数据元素。 至少一个蝶形处理器（364）耦合到输入寄存器，并且被配置为对所选择的数据元素对执行至少一个数学运算，以产生经处理的数据元素的输出。 至少一个中间寄存器（340）耦合到蝶形处理器并被配置为临时存储处理后的数据。 反馈回路耦合到中间寄存器和蝶形处理器，并且如果启用，则被配置为将经处理的数据元素的第一部分传送到适当的蝶形处理器以执行附加的数学运算，并且如果被禁用则被配置为传送第二 处理的数据元素的一部分到至少一个保持寄存器。