Abstract:
A bandpass .SIGMA..DELTA. ADC utilises either a single-loop (10) or a MASH architecture (12, 100, 121). Resonators are implemented as either a delay cell resonator (131), a lossless discrete integrator resonator (132), a ForwardEuler resonator (133), or a two-path interleaved resonator (134). The resonator can be synthesized with analog circuit techniques such as active-RC, gm-C, MOSFET-C, switched capacitor, or switched current. The switched capacitor or switched current circuits can be designed using single-sampling, double-sampling, or multi-sampling circuits. The non-stringent requirement of a .SIGMA..DELTA. ADC using switched capacitor circuits allows the ADC to be implemented in a CMOS process to minimize cost and reduce power consumption. Double-sampling circuits (101) provide improved matching and improved tolerance to sampling clock jitter. In particular, a bandpass MASH 4-4 .SIGMA..DELTA. ADC provides a simulated signal-to-noise ratio of 85dB at an oversampling ratio of 32 for a CDMA application. The bandpass .SIGMA..DELTA. ADC canalso be used in conjunction with undersampling to provide a frequency downconversion.
Abstract:
A method and system for disabling a mobile unit to handle a call processing function, after being away from its charging unit longer than a predetermined time period, allows a service provider to limit the mobility of the mobile unit with respect to its companion charging unit. Consequently, the service provider may limit the mobility of the mobile unit in a limited area, such as in a wireless local loop.
Abstract:
The frequency error of an oscillator is minimized by characterizing the operating environment of the oscillator. An electronic device monitors parameters that are determined to have an effect on the frequency accuracy of the internal frequency source. Temperature is one parameter known to have an effect on the frequency of the internal frequency source and a primary contributor to device temperature is the RF Power Amplifier (PA). The electronic device collects and stores the activity level of the PA. The effective PA duty cycle over a predetermined period of time is calculated. The LO operating environment is stabilized by operating the PA at the calculated duty cycle when the LO is required to operate in a high stability mode.
Abstract:
Transmitter architectures for a communications system having improved performance over conventional transmitter architectures. The improvements include a combination of the following: faster response time for the control signals, improved linearity, reduced interference, reduced power consumption, lower circuit complexity, and lower costs. For a cellular application, these improvements can lead to increased system capacity, smaller telephone size, increased talk and standby times, and greater acceptance of the product. Circuitry is provided to speed up the response time of a control signal. The control loop for various elements in the transmit signal path are integrated. A gain control mechanism allows for accurate adjustment of the output transmit power level. Control mechanisms are provided to power down the power amplifier, or th e entire transmit signal path, when not needed. The gains of the various elements in the transmit signal path are controlled to reduce transients in the output transmit power, and to also ensure that transients are downward.
Abstract:
Techniques to rotate the phase of a received signal to compensate for phase change or discontinuity introduced by circuit elements located directly in the receive signal path. One or more control signals are received, with each control signal being provided to adjust a particular characteristic of one or more circuit elements associated with the receive signal path. A phase rotation corresponding to an operating state defined by the control signals is then determined, and the phase of the received signal is rotated by an amount related to the determined phase rotation. In some designs, the phase rotation is performed on digitized inphase I IN and quadrature Q IN samples to generate phase rotated I ROT and Q ROT samples. The phase rotation can be performed by a complex multiply (after DC offset compensation) and, for ease of implementation, can be performed digitally in discrete increments (e.g., 90° increments).
Abstract:
A PROGRAMMABLE DYNAMIC RANGE RECEIVER (1200) WHICH PROVIDES THE REQUISITE LEVEL OF PERFORMANCE AT REDUCED POWER CONSUMPTION. THE Sr ADC WITHIN THE RECEIVER IS DESIGNED WITH ONE OR MORE LOOPS. EACH LOOP PROVIDES A PREDETERMINED DYNAMIC RANGE PERFORMANCE. THE LOOPS CAN BE ENABLED OR DISABLED BASED ON THE REQUIRED DYNAMIC RANGE AND A SET OF DYNAMIC RANGE THRESHOLDS. THE Sr ADC IS ALSO DESIGNED WITH ADJUSTABLE BIAS CURRENT. THE DYNAMIC RANGE OF THE Sr ADC VARIES APPROXIMATELY PROPORTIONAL TO THE BIAS CURRENT. BY ADJUSTING THE BIAS CURRENT, THE REQUIRED DYNAMIC RANGE CAN BE PROVIDED BY THE Sr ADC WITH MINIMAL POWER CONSUMPTION. A REFERENCE VOLTAGE OF THE Sr ADC CAN BE DESCREASED WHEN HIGH DYNAMIC RANGE IS NOT REQUIRED, THEREBY ALLOWING FOR LESS BIAS CURRENT IN THE Sr ADC AND SUPPORTING CIRCUITRY. THE DYNAMIC RANGE OF THE Sr ADC IS A ALSO FUNCTION OF THE OVERSAMPLING RATIO WHICH IS PROPORTIONAL TO THE SAMPLING FREQUENCY. HIGH DYNAMIC RANGE REQUIRES A HIGH OVERSAMPLING RATIO. WHEN HIGH DYNAMIC RANGE IS NOT REQUIRED, THE SAMPLING FREQUENCY CAN BE LOWERED. (FIGURE 2)
Abstract:
A receiver that downconverts input signals modulated using first, second, third and fourth modulation formats to a common intermediate frequency range. The first and second modulation formats are transmitted to the receiver in a first frequency range, the third modulation format is transmitted to the receiver in a second frequency range, and the fourth modulation format is transmitted to the receiver in a third frequency range. The input signals are provided to first, second and third band selection filters that respectively select first, second and third frequency ranges. A first downconverter is coupled to an output of the first band selection filter, and downconverts signals from the first frequency range to the common intermediate frequency range. A second downconverter is selectively coupled by a switch to either an output of the second band selection filter or an output of the third band selection filter, and downconverts signals from either the second frequency range or the third frequency range to the common intermediate frequency range. The second downconverter has an input coupled to a frequency doubling circuit. Switching circuitry selectively couples one of either a first oscillating signal from a voltage controlled oscillator (VCO) having a VCO frequency range or a second oscillating signal at a second frequency that is outside the VCO frequency range to an input of the first downconverter and an input of the frequency doubling circuit.
Abstract:
Techniques to rotate the phase of a received signal to compensate for phase change or discontinuity introduced by circuit elements located directly in the receive signal path. One or more control signals are received, with each control signal being provided to adjust a particular characteristic of one or more circuit elements associated with the receive signal path. A phase rotation corresponding to an operating state defined by the control signals is then determined, and the phase of the received signal is rotated by an amount related to the determined phase rotation. In some designs, the phase rotation is performed on digitized inphase I IN and quadrature Q IN samples to generate phase rotated I ROT and Q ROT samples. The phase rotation can be performed by a complex multiply (after DC offset compensation) and, for ease of implementation, can be performed digitally in discrete increments (e.g., 90° increments).
Abstract:
The frequency error of an oscillator is minimized by characterizing the oscillator. A reference signal from an external source containing a minimal frequency error is provided to an electronic device. The external signal is used as a reference frequency to estimate the frequency error of an internal frequency source. The electronic device monitors parameters that are determined to have an effect on the frequency accuracy of the internal frequency source. Temperature is one parameter known to have an effect on the frequency of the internal frequency source. The electronic device collects and stores the values of the parameters as well as the corresponding output frequency or frequency error of the internal frequency source. The resultant characterization of the internal frequency source is used to compensate the internal frequency source when the internal frequency source is not provided the external reference signal.
Abstract:
A programmable linear receiver which provides the requisite level of system performance at reduced power consumption. The receiver minimizes power consumption based on measurement of the non-linearity in the output signal from the receiver. The amount of non-linearity can be measured by the RSSI slope or energy-per-chip-to-noise-ratio (Ec/Io) measurement. The RSSI slope is the ratio of the change in the output signal plus intermodulation to the change in the input signal. The input signal level is periodically increased by a predetermined level and the output signal from the receiver is measured. The output signal comprises the desired signal and intermodulation products from non-linearity within the receiver. When the receiver is operating linearly, the output signal level increases dB per dB with the input signal level. However, as the receiver transitions into non-linear region, intermodulation products due to non-linearity increase faster than the desired signal. By detecting the RSSI slope, the amount of degradation due to non-linearity can be determined. This information is then used to adjust the IIP3 operating point of the amplifiers and mixer to provide the requisite level of performance while minimizing power consumption.