公开(公告)号：JP2001119272A

公开(公告)日：2001-04-27

申请号：JP29592999

申请日：1999-10-18

Applicant: SONY CORP

Inventor： YAMAOKA SHINSUKE ,  OKAMOTO ICHIRO ,  SAITO TAKEHIKO ,  KOTANI YASUTAKA ,  NIKATA KENJI

IPC: H03K3/354 ,  H03B28/00 ,  H03L7/00 ,  H03L7/07

Abstract: PROBLEM TO BE SOLVED: To reduce the production cost of a digital LSI(large scale integrated circuit), for example, by generating an oscillation signal without converting a digital signal into an analog signal. SOLUTION: This device is provided with a delay coarse adjustment circuit 3 which has its delay value that is changed stepwise according to a delay coarse adjustment signal S11 and gives rough delay to an inputted oscillation signal S12, a delay fine adjustment circuit 4 which has its delay value that is changed stepwise according to a delay fine adjustment signal S2 and gives fine delay smaller than the delay value of the circuit 3 to an inputted oscillation signal S13 and an inverter circuit 5 to which an oscillation signal S14 is inputted from the circuit 3 or 4. In such an arrangement, the highly accurate delay is secured to generate an oscillation output signal S15 by carrying out the fine adjustment of delay via the circuit 3 and also carrying out the fine adjustment of delay via the circuit 4. When the circuits 3, 4 and 5 are connected together in a ring form, the oscillation frequency of oscillation signals can be controlled stepwise.

公开(公告)号：JP2000207841A

公开(公告)日：2000-07-28

申请号：JP560399

申请日：1999-01-12

Applicant: SONY CORP

Inventor： KOTANI YASUTAKA

IPC: G11B20/10

Abstract: PROBLEM TO BE SOLVED: To improve the reliability of data reproduction by adding an identification code from which distance to an identification code used at the time of recording directly before is 2 or more when an identification code having a different value for every one recording is added to data to be recorded. SOLUTION: A digital video camera 1 converts an image signal S1 and a voice signal S2 into digital signals, adds ID data including synchronous data and an OWP (discrimination) code for each prescribed unit to video voice data D5 being compression-encoded and multiplexed by a ECC processing section 16, makes the data into block, after RF conversion is performed, the data are recorded in a magnetic tape 4. At the time, the ECC processing section 16 generates the OWP code of 8 bits so that count-up is performed by a gray code, inserting successively all bits inversion. Thereby, distance between the front and rear OWP codes becomes 7 or more without fail in binary notation, and an error can be prevented.

公开(公告)号：JP2000207706A

公开(公告)日：2000-07-28

申请号：JP697599

申请日：1999-01-13

Applicant: SONY CORP

Inventor： KIKO SHINKO ,  ENDO JUNYA ,  KOTANI YASUTAKA ,  YASAKA KAZUYUKI ,  OSABE HISAO ,  KIMURA MASANORI

IPC: G11B5/02 ,  G11B5/127 ,  G11B5/23

Abstract: PROBLEM TO BE SOLVED: To provide a digital signal and/or analog signal recording and/or reproducing magnetic head and a magnetic recording and reproducing device using the magnetic head at a low cost with a simple constitution. SOLUTION: This is a magnetic head for recording and/or reproducing a digital signal and/or an analog signal recorded in a magnetic recording medium for recording the digital signal and/or the analog signal. In this case, an azimuth angle formed in a gap 33 of a magnetic head 21 is set so as to be almost 10 deg. in the magnetic head 21.

公开(公告)号：JPH11328855A

公开(公告)日：1999-11-30

申请号：JP13395998

申请日：1998-05-15

Applicant: SONY CORP

Inventor： SATO NAOYUKI ,  KOTANI YASUTAKA ,  OKAMOTO ICHIRO

IPC: G11B20/10

Abstract: PROBLEM TO BE SOLVED: To provide method and device for adjusting automatic gain control and a decoding circuit eliminating limitation of the degree of freedom in a manufacturing line and facilitating reajustment when an adjustment value is shifted by some cause after assembling to a set. SOLUTION: A ternary detection part 20 detects ternary from an equalization output from a conversion circuit 19. A sample extraction part 21 absolutizes a sample incorporated in one among the ternary detected by the ternary detection part 20 to extract it. An integrator 22 integrates the sample extracted by the sample extraction part 21. A CPU 23 generates an envelope control signal based on the integrated value from the integrator 22. An envelope adjustment part 24 controls a gain of an AGC based on the envelope control signal from the CPU 23.

公开(公告)号：JPH1173741A

公开(公告)日：1999-03-16

申请号：JP23364897

申请日：1997-08-29

Applicant: SONY CORP

Inventor： KOTANI YASUTAKA ,  OKAMOTO ICHIRO ,  YOSHIOKA SHINGO

IPC: G11B20/14

Abstract: PROBLEM TO BE SOLVED: To shorten the time required for pulling-in PLL at the time when the next data is reproduced by supplying dummy signals to the PLL and lock it while the playback data is not present. SOLUTION: An edge pulse is outputted by an edge pulse generating circuit 21 based on a switch pulse(SWP) signal to be supplied to a counter 22. This edge pulse is counted by the counter 22 to supply counts to a decoder 23. In response to the number of counts, PLLSW signals and enb10M signals outputted from the decoder 23 are activated. The enb10M signals are supplied to a selector 25, and in response to enb10M signals recording signals supplied to the selector 25 and clock signals whose frequency is divided to 1/4 in a 1/4 frequency dividing circuit 24 are switched to be supplied to the PLL circuit of the next RF system.

公开(公告)号：JPH08227560A

公开(公告)日：1996-09-03

申请号：JP5660395

申请日：1995-02-21

Applicant: SONY CORP

Inventor： MIYAGI SHIRO ,  KOTANI YASUTAKA

IPC: G11B20/14 ,  G11B27/032 ,  G11B27/036

Abstract: PURPOSE: To prevent a clock generated by PLL from being deviated largely from a reproduced signal at the time of after-recording. CONSTITUTION: A recorded signal from a recording amplifier 9 is supplied to heads 1A, 1B through a switch 8A and a rotary transformer 3 and recorded on a tape. A reproduced signal is supplied to a channel decoding circuit 12 through a switch 8B and a reproducing amplifier 11. A signal passed through a switch 16 is supplied to a PLL 15 as a reference signal. The switch 16 selects a recorded signal at the time of recording, and selects a reproduced signal at the time of reproducing. Therefore, interruption of a reference signal for the PLL 15 can be prevented at the time of after-recording.

公开(公告)号：JPH08221703A

公开(公告)日：1996-08-30

申请号：JP5501495

申请日：1995-02-20

Applicant: SONY CORP

Inventor： KOTANI YASUTAKA ,  MIYAGI SHIRO

IPC: G11B5/09 ,  G11B20/14 ,  G11B20/18

Abstract: PURPOSE: To obtain such a digital signal reproducing device that the adjustment of a circuit is easy and the stable operation is secured. CONSTITUTION: The output of an AGC circuit 5 is supplied to both of an A/D converter 6 and a QFB circuit 7. In the QFB circuit 7, a rectangular wave is produced by a signal from the circuit 5 and supplied to a PLL circuit 8, wherein a clock for the circuit 6 is produced from this rectangular wave. Reference voltages of the circuit 7 and circuit 6 are supplied from a reference voltage source 11 which is incorporated in an IC including the circuit 7. Since a feedback gain of the circuit 7 is controlled by the supplied reference voltage, the circuit 7 is operatable without adjustment. The reference voltage of the circuit 6 is also supplied from the voltage source 11, so the adjustment is unrequired. Consequently, the adjustment of the whole device is completed by only supplying the signal to the circuit 5 and adjusting it while monitoring the output of the circuit 6.

公开(公告)号：JPH03296905A

公开(公告)日：1991-12-27

申请号：JP9929290

申请日：1990-04-17

Applicant: SONY CORP

Inventor： FUJII HIROSHI ,  KOTANI YASUTAKA

IPC: G11B5/11

Abstract: PURPOSE:To increase the surface area of a tongue part and to reduce impedance based upon a skin effect by constituting a fitting for fixing a shield to a fixed drum of a curved part to be attached to a fixed drum and the tongue part to be attached to a shield body and forming the cross section of the tongue part like a wave form. CONSTITUTION:The fitting 31 for fixing the shield body 12 to the fixed drum 3 is constituted of the curved part 31a to be attached to the fixed drum 3 and the tongue part 31b to be attached to the shield body 12 and the cross section of the tongue part 31a is shaped like a waveform. Thereby, the surface area of the tongue 31b is increased, the impedance can be reduced by the skin effect, and a fine projection is formed on the contact surface of the curved part 31a with the fixed drum 3, contact resistance between the drum (including fixed drum) 4 and the fitting 31 can be reduced.

公开(公告)号：JPH03289782A

公开(公告)日：1991-12-19

申请号：JP9118690

申请日：1990-04-05

Applicant: SONY CORP

Inventor： KOTANI YASUTAKA

IPC: H04N5/922 ,  G11B20/06 ,  H04N5/92 ,  H04N5/928

Abstract: PURPOSE:To keep a frequency modulation circuit in a satisfactory state by adjusting the frequency modulation circuit which modulates a video signal to the one for recording while a signal other than the video signal is recorded in a first interval. CONSTITUTION:The recording of the signal is performed at the winding angle

公开(公告)号：JPS63131797A

公开(公告)日：1988-06-03

申请号：JP27787586

申请日：1986-11-21

Applicant: SONY CORP

Inventor： KOTANI YASUTAKA

IPC: H04N9/87

Abstract: PURPOSE:To correct and output a VID to a correct sequence and to demodulate satisfactory chrominance signals with this by forecasting the inversion of the sequence of chrominance components and controlling the change-over of the inserting and detaching of a delaying circuit with a forecasting signal. CONSTITUTION:In a color sequence correcting circuit to detect (circuit 5) the change of the sequence of chrominance signals in a reproducing signal and change over (flip- flop 7 and a switch 3) the inserting and detaching of the delaying circuit 2 of one horizontal period with the detecting signal, at the time of a speed change reproduction, the change of the sequence of the chrominance signals is forecast (terminal 1, monomulti 12 and 13 and NAND circuits 14-16) in accordance with the mode (terminals 17 and 18) of the speed change reproduction and the change-over of the inserting and detaching of the delaying circuit 2 for one horizontal period is controlled (AND circuit 6) with the forecasting signal. Thus, since the inversion of the sequence of the chrominance signals is forecast and the change-over of the inserting and detaching of the delaying circuit 2 is controlled by the forecasting signal, a non- modulating carrier period (VID) is corrected and outputted to a correct sequence beforehand, and with this, the satisfactory chrominance signals can be demodulated.