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公开(公告)号：DE69920651D1
公开(公告)日：2004-11-04
申请号：DE69920651
申请日：1999-12-23
Applicant: SONY CORP
Inventor： MORI HIROYA , KOTANI YASUTAKA , IESAKA KAZUYUKI , OSABE HISAO , KIMURA MASANORI
IPC: G11B5/008 , G11B5/02 , G11B20/10 , G11B15/18 , G11B15/467 , G11B20/12 , H04N5/77 , H04N5/7826 , H04N9/79 , G11B5/09
Abstract: A magnetic recording device and method, a magnetic reproduction device and method and a tape recording medium of improved performance are disclosed. Tracks are formed successively and obliquely along the longitudinal direction of a second magnetic tape having a width wider than a first magnetic tape and recording data is continuously recorded for at least two tracks of a digital recording format on each formed track, with each formed track being formed at a predetermined track pitch set based on the recording time and the reproduction signal characteristic. Thereby, recording data based on a digital recording format for application to the first magnetic tape can exhibit a sufficient C/N ratio and be recorded on the second magnetic tape for a long time.
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公开(公告)号：DE60036445D1
公开(公告)日：2007-10-31
申请号：DE60036445
申请日：2000-10-11
Applicant: SONY CORP
Inventor： YAMAOKA NOBUSUKE , OKAMOTO ICHIRO , SAITO TAKEHIKO , KOTANI YASUTAKA , NIKATA KENJI
Abstract: There are provided the delay coarse adjustment circuit 3, the delay fine adjustment circuit 4, and the inverter circuit 5. The delay coarse adjustment circuit 3 stepwise varies a delay amount based on the delay coarse adjustment signal S11 and supplies the input oscillation signal S12 with a coarse delay. The delay fine adjustment circuit 4 stepwise varies a delay amount based on the delay fine adjustment signal S2 and supplies the input oscillation signal S13 with a fine delay which is smaller than a delay amount supplied by the delay coarse adjustment circuit 3. The inverter circuit 5 inputs the oscillation signal S14 from the delay coarse adjustment circuit 3 or the delay fine adjustment circuit 4. The delay coarse adjustment circuit 3 coarsely adjusts delays. The delay fine adjustment circuit 4 fine adjusts delays. The coarse and fine adjustments provide a precision delay to generate the oscillation output signal S15. The delay coarse adjustment circuit 3, the delay fine adjustment circuit 4, and the inverter circuit 5 are connected in a ring for stepwise controlling an oscillation signal's oscillation frequency.
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公开(公告)号：AU783408B2
公开(公告)日：2005-10-27
申请号：AU3134601
申请日：2001-03-27
Applicant: SONY CORP
Inventor： TESHIROGI HIDEHIKO , NAKAMATSU KEITA , YAMAMURA TAKAYA , KOTANI YASUTAKA , ABE FUMIYOSHI , HISHINO TSUKASA
IPC: H04N5/7826 , G10L19/00 , G10L19/02 , G11B5/008 , G11B5/09 , G11B20/10 , G11B20/12 , G11B20/14 , G11B20/18 , G11B27/30 , H04N5/91 , H04N5/92 , H04N5/928 , H04N9/79 , H04N9/804 , H04N9/806 , H04N9/82
Abstract: A magnetic-tape recording apparatus records digital data on a magnetic tape (14) by a rotating head (12). It includes a first obtaining device (1) for obtaining predetermined-unit video data; a second obtaining device (2) for obtaining audio data corresponding to the predetermined-unit video data; a synthesizing device (4) for synthesizing the predetermined-unit video data and the audio data corresponding to the predetermined-unit video data such that they are continuous on a track in the magnetic tape (14) without any space disposed therebetween; and a sending device (5-11) for sending data synthesized by the synthesizing device (4) to the rotating head (12) in order to record the data on the magnetic tape (14).
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公开(公告)号：GB2416948B
公开(公告)日：2006-11-15
申请号：GB0515019
申请日：2005-07-21
Applicant: SONY CORP
Inventor： SEKIGUCHI MASAMI , KAWATA SHOGO , KOTANI YASUTAKA
Abstract: A video camera apparatus provided with image capturing means, which includes: audio communication means for receiving an audio signal from a wireless microphone of a subject through short-range wireless data communication means; and recording means for recording image information of the subject captured by the image capturing means and an audio signal received by the audio communication means.
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公开(公告)号：DE69612894T2
公开(公告)日：2001-11-15
申请号：DE69612894
申请日：1996-02-14
Applicant: SONY CORP
Inventor： MIYAGI SHIRO , KOTANI YASUTAKA
IPC: G11B20/14 , G11B27/032 , G11B27/036 , G11B20/10
Abstract: In an apparatus and method for recording and/or reproducing a digital signal, an input digital signal is received (4) and processed by a recording processing device so as to form a recording signal. The recording signal may be recorded onto and reproduced from a recording medium (2). The reproduced signal may be processed by a reproducing processing device so as to form an output signal (14). Processing performed by the reproducing processing device may be controlled by a clock signal provided by a phase-locked loop (PLL) circuit (15). The PLL circuit (15) respectively receives the recording and reproduced signals when the apparatus is operating in a recording mode and a reproducing mode, and generates the clock signal therefrom. Alternatively, instead of the recording signal, the PLL circuit (15) may receive a leakage current when the apparatus is operating in the recording mode. In this latter situation, the PLL circuit generates the clock signal from the leakage current and the reproduced signal. As a result, signals may be satisfactorily reproduced and processed even after operations (such as after-recording operations) wherein reproduced signals are unavailable for supply to the PLL circuit are completed.
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Patent Agency Ranking
公开(公告)号：DE69612894D1
公开(公告)日：2001-06-28
申请号：DE69612894
申请日：1996-02-14
Applicant: SONY CORP
Inventor： MIYAGI SHIRO , KOTANI YASUTAKA
IPC: G11B20/14 , G11B27/032 , G11B27/036 , G11B20/10
Abstract: In an apparatus and method for recording and/or reproducing a digital signal, an input digital signal is received (4) and processed by a recording processing device so as to form a recording signal. The recording signal may be recorded onto and reproduced from a recording medium (2). The reproduced signal may be processed by a reproducing processing device so as to form an output signal (14). Processing performed by the reproducing processing device may be controlled by a clock signal provided by a phase-locked loop (PLL) circuit (15). The PLL circuit (15) respectively receives the recording and reproduced signals when the apparatus is operating in a recording mode and a reproducing mode, and generates the clock signal therefrom. Alternatively, instead of the recording signal, the PLL circuit (15) may receive a leakage current when the apparatus is operating in the recording mode. In this latter situation, the PLL circuit generates the clock signal from the leakage current and the reproduced signal. As a result, signals may be satisfactorily reproduced and processed even after operations (such as after-recording operations) wherein reproduced signals are unavailable for supply to the PLL circuit are completed.
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公开(公告)号：DE69932380T2
公开(公告)日：2007-07-12
申请号：DE69932380
申请日：1999-05-06
Applicant: SONY CORP
Inventor： IESAKA KAZUYUKI , KOTANI YASUTAKA
Abstract: A digital video cassette recorder comprising a plurality of heads provided on a rotary member and performing the recording/playback of the data on slanted tracks in performing helical scanning for a magnetic recording medium with the above mentioned heads, wherein the heads being composed of a first and a second heads being disposed opposing to each other at an angle of 180 DEG and a third head being disposed in a position at an angle of 270 DEG in the direction of rotation from the first head, having the same azimuth angle as that of the second head, the digital video cassette recorder also comprising a changeover switch for switching the first, the second and the third heads, and two modes having different data compression rates from each other, and in the first mode, recording/playback being performed in switching the first and the second heads alternately, and in the second mode, the tape feeding speed is made half and recording/playback being performed once in two rotations in switching the first and the third heads alternately. The fixing heights of heads on the rotary member are made to differ in every head, in order to reduce the difference in head outputs caused by the difference in azimuth angles related with the direction of orientation of the magnetic recording medium and the recording direction of the slanted tracks and to reduce the difference in head outputs caused by the imbalance of the side erase at the time of recording.
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公开(公告)号：DE102005035465A1
公开(公告)日：2006-03-16
申请号：DE102005035465
申请日：2005-07-28
Applicant: SONY CORP
Inventor： SEKIGUCHI MASAMI , KAWATA SHOGO , KOTANI YASUTAKA
Abstract: A video camera apparatus provided with image capturing means, which includes: audio communication means for receiving an audio signal from a wireless microphone of a subject through short-range wireless data communication means; and recording means for recording image information of the subject captured by the image capturing means and an audio signal received by the audio communication means.
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公开(公告)号：DE60036445T2
公开(公告)日：2008-06-19
申请号：DE60036445
申请日：2000-10-11
Applicant: SONY CORP
Inventor： YAMAOKA NOBUSUKE , OKAMOTO ICHIRO , SAITO TAKEHIKO , KOTANI YASUTAKA , NIKATA KENJI
Abstract: There are provided the delay coarse adjustment circuit 3, the delay fine adjustment circuit 4, and the inverter circuit 5. The delay coarse adjustment circuit 3 stepwise varies a delay amount based on the delay coarse adjustment signal S11 and supplies the input oscillation signal S12 with a coarse delay. The delay fine adjustment circuit 4 stepwise varies a delay amount based on the delay fine adjustment signal S2 and supplies the input oscillation signal S13 with a fine delay which is smaller than a delay amount supplied by the delay coarse adjustment circuit 3. The inverter circuit 5 inputs the oscillation signal S14 from the delay coarse adjustment circuit 3 or the delay fine adjustment circuit 4. The delay coarse adjustment circuit 3 coarsely adjusts delays. The delay fine adjustment circuit 4 fine adjusts delays. The coarse and fine adjustments provide a precision delay to generate the oscillation output signal S15. The delay coarse adjustment circuit 3, the delay fine adjustment circuit 4, and the inverter circuit 5 are connected in a ring for stepwise controlling an oscillation signal's oscillation frequency.
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公开(公告)号：DE69932380D1
公开(公告)日：2006-08-31
申请号：DE69932380
申请日：1999-05-06
Applicant: SONY CORP
Inventor： IESAKA KAZUYUKI , KOTANI YASUTAKA
Abstract: A digital video cassette recorder comprising a plurality of heads provided on a rotary member and performing the recording/playback of the data on slanted tracks in performing helical scanning for a magnetic recording medium with the above mentioned heads, wherein the heads being composed of a first and a second heads being disposed opposing to each other at an angle of 180 DEG and a third head being disposed in a position at an angle of 270 DEG in the direction of rotation from the first head, having the same azimuth angle as that of the second head, the digital video cassette recorder also comprising a changeover switch for switching the first, the second and the third heads, and two modes having different data compression rates from each other, and in the first mode, recording/playback being performed in switching the first and the second heads alternately, and in the second mode, the tape feeding speed is made half and recording/playback being performed once in two rotations in switching the first and the third heads alternately. The fixing heights of heads on the rotary member are made to differ in every head, in order to reduce the difference in head outputs caused by the difference in azimuth angles related with the direction of orientation of the magnetic recording medium and the recording direction of the slanted tracks and to reduce the difference in head outputs caused by the imbalance of the side erase at the time of recording.
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