公开(公告)号：JPH1065339A

公开(公告)日：1998-03-06

申请号：JP22143796

申请日：1996-08-22

Applicant: SONY CORP

Inventor： MATSUDA YOSHINARI

IPC: H05K3/40 ,  H05K3/46

Abstract: PROBLEM TO BE SOLVED: To obtain a multilayer printed wiring board of high reliability which enables improvement in productivity by a simple facility and cost cutting. SOLUTION: A via hole 9 is formed through outer-layer land portions 6a, 7a of laminated outer-layer conductor circuits and inner-layer land portions 2a, 3a of laminated inner-layer conductor circuit on a multilayer printed wiring board with a plurality of conductor layers stacked via the insulating layers. And the via holes 9 is filled with conductive paste 13, heat curing of the conductive paste 13 is then performed to connect electrically the outer-layer land portions 6a, 7a and the inner-layer land portions 2a, 3a.

公开(公告)号：JPH09232753A

公开(公告)日：1997-09-05

申请号：JP6032496

申请日：1996-02-23

Applicant: SONY CORP

Inventor： MATSUDA YOSHINARI ,  KOMATSU NOBUO

IPC: H05K3/40 ,  H05K3/24

Abstract: PROBLEM TO BE SOLVED: To realize a high density package of circuit elements and high density coiring and reduce the production process. SOLUTION: A wiring pattern is formed on a printed circuit board, a solder resist layer is formed thereon, except electrode regions of this pattern, wiring lines are formed to bridge jumper electrodes, using a metal paste having solder wettability, the surface of the wiring line is coated with solder to form jumpers with the lines and solder coating layer.

公开(公告)号：JPH09232744A

公开(公告)日：1997-09-05

申请号：JP4113996

申请日：1996-02-28

Applicant: SONY CORP ,  TOKYO PROCESS SERVICE

Inventor： MATSUDA YOSHINARI ,  MORITA KOJI ,  SASAME KIYOSHI

IPC: H05K3/34 ,  H05K3/00 ,  H05K3/28

Abstract: PROBLEM TO BE SOLVED: To provide a printed circuit board manufacturing method superior in mass productivity by improving the soldering work efficiency. SOLUTION: Electronic elements 1 housed in a housing 9 are coated with a resin material 10 having an ultraviolet hardening-thermosetting combined solder resist property and the resin material is hardened. The material 10 deposited on at least land-connecting faces of the terminals 3 of each element 10 is cleaned.

公开(公告)号：JPH09181424A

公开(公告)日：1997-07-11

申请号：JP33340695

申请日：1995-12-21

Applicant: SONY CORP

Inventor： MATSUDA YOSHINARI ,  KUBO MINORU

IPC: H05K3/28

Abstract: PROBLEM TO BE SOLVED: To suppress terminals from being short-circuited with solder even if the terminal pitch is reduced, thereby enabling the high-density package. SOLUTION: A resin layer 4 having a solder resist is formed to cover terminals 3 of an electronic component 1, except end parts 3b to be electrically connected to a wiring circuit pattern. It will surface to form this layer 4 on at least the back face of each terminal 3, facing at the circuit pattern, except its end 3b. The terminal 3 are laid on lands 6 of the wiring circuit pattern of a printed wiring board 5 and soldered to the lands 6 with solder 7.

公开(公告)号：JPH06112640A

公开(公告)日：1994-04-22

申请号：JP26226092

申请日：1992-09-30

Applicant: SONY CORP

Inventor： MATSUDA YOSHINARI ,  KAYABA MASAO

IPC: H05K1/11 ,  H05K1/18 ,  H05K3/26 ,  H05K3/34 ,  H05K3/42

Abstract: PURPOSE:To position a through-hole forming position and a circuit component soldering position close to each other with a simple process. CONSTITUTION:Predetermined electrode patterns 12 are formed on a board 10 and a circuit component 3 is mounted on the predetermined positions of the electrode patterns 12 and connected electrically to them to constitute an electronic circuit. Through-holes 11 formed in the electrode patterns 12 on the board 10 are filled with conductive metal particle paste 14 and the circuit component 3 is soldered to the through-holes 11.

公开(公告)号：JP2008258501A

公开(公告)日：2008-10-23

申请号：JP2007100856

申请日：2007-04-06

Applicant: Sony Corp ,  ソニー株式会社

Inventor： MATSUDA YOSHINARI ,  OHORI REI

IPC: H05K3/24 ,  H05K1/18 ,  H05K7/14

Abstract: PROBLEM TO BE SOLVED: To readily and economically obtain an electrical connection that is stable over an extended time period.
SOLUTION: On a circuit board 10, a conductive paste is used to form a conductive film 13 on a connection region 12a of a ground pattern 12 that is located at a position around a mounting hole 11. In a housing 20, a screw hole 21 is previously made at a position facing a mounting hole 11 of the circuit board 10. The circuit board 10 is disposed at a prescribed position of the housing 20, such that a bearing surface of a screw 31 faces the conductive film 13; the screw 31 is screwed into the screw hole 21 from the circuit board 10 side to fix the circuit board 10 to the housing 20. At this time, the ground pattern 12 of the circuit board 10 becomes electrically continuous with the housing 20 via the conductive film 13 and the screw 31. Since the connection region 12a of the ground pattern 12 is covered with the conductive film 13, stable continuity between the circuit board 10 and the housing 20 can be secured over a long time period.
COPYRIGHT: (C)2009,JPO&INPIT

Abstract translation: 要解决的问题：为了容易且经济地获得在延长的时间段内稳定的电连接。 解决方案：在电路板10上，使用导电膏在位于安装孔11周围的接地图案12的连接区域12a上形成导电膜13.在壳体20中， 螺钉孔21预先在与电路板10的安装孔11相对的位置处形成。电路板10设置在壳体20的规定位置，使得螺钉31的支承表面面向导电膜13; 螺钉31从电路板10侧拧入螺钉孔21中，将电路板10固定到外壳20.此时，电路板10的接地图案12通过导电 膜13和螺钉31.由于接地图案12的连接区域12a被导电膜13覆盖，所以可以在长时间内确保电路板10和壳体20之间的稳定的连续性。 版权所有（C）2009，JPO＆INPIT

公开(公告)号：JP2002324958A

公开(公告)日：2002-11-08

申请号：JP2001127625

申请日：2001-04-25

Applicant: SONY CORP

Inventor： MATSUDA YOSHINARI

IPC: H05K3/42 ,  H05K1/02 ,  H05K1/11 ,  H05K3/38 ,  H05K3/40

Abstract: PROBLEM TO BE SOLVED: To fabricate a copper through hole printed-wiring board using an inexpensive paper-phenol substrate. SOLUTION: An annular hollow 2 is formed on the surroundings of a through hole 3, where separation between a copper paste 6 and a copper foil land 1, 1 is easy to occur to the copper foil land 1, 1 that the through hole 3 to fill the copper paste 6 is formed. As a result, the adhesion between the copper paste 6 and the copper foil land 1, 1 is improved.

公开(公告)号：JP2002094195A

公开(公告)日：2002-03-29

申请号：JP2000281769

申请日：2000-09-12

Applicant: SONY CORP

Inventor： MATSUDA YOSHINARI

IPC: H05K1/11 ,  H01L23/12 ,  H01P3/08 ,  H01P5/02 ,  H01P11/00 ,  H05K1/02 ,  H05K3/00 ,  H05K3/40 ,  H05K3/46

Abstract: PROBLEM TO BE SOLVED: To provide a signal wiring board which is easily manufactured, capable of controlling the characteristic impedance of a signal transmission line at a low cost by the use of a small space, and capable of stably transmitting high-frequency signals without causing delays. SOLUTION: A signal wiring board is composed of a tabular base material 1, a signal transmission line 9 which is formed on the front surface 37 of the base material 1 to transmit high-frequency signal, an insulating layer 11 which is made uniform in thickness so as to cover the signal transmission line 9, and a control means 13 which is formed on the insulating layer 11 as grounded so as to control the characteristic impedance of the signal transmission line in face to face with the signal transmission line 9.

公开(公告)号：JP2002076561A

公开(公告)日：2002-03-15

申请号：JP2000254178

申请日：2000-08-24

Applicant: SONY CORP

Inventor： MATSUDA YOSHINARI ,  ODA KATSUYOSHI ,  TSURUMI MASAMI ,  MURAYAMA TOSHIHIRO

IPC: H05K1/18 ,  H01L23/34 ,  H05K1/14 ,  H05K3/36

Abstract: PROBLEM TO BE SOLVED: To provide a solid circuit board device of relatively low price for high-density mounting. SOLUTION: On a circuit board 11, surface-mounting components 12 and 13 are soldered and fixed. A relay circuit board 14 where copper foil lands 14b and 14c are formed on both surfaces, comprising a through hole 14a, is soldered to the circuit board 11 through the copper foil land 14b on its one surface and fixed, while it is connected and fixed to another circuit board 16 by soldering through the copper land 14c on the other surface of the relay circuit board 14.

公开(公告)号：JP2001296814A

公开(公告)日：2001-10-26

申请号：JP2000109665

申请日：2000-04-11

Applicant: SONY CORP

Inventor： SUZUKI YOSHIO ,  MATSUDA YOSHINARI

IPC: H01L51/50 ,  G09F9/00 ,  G09F9/30 ,  G09G3/20 ,  G09G3/30 ,  H01L27/32 ,  H05B33/12 ,  H05B33/14

Abstract: PROBLEM TO BE SOLVED: To prevent the deterioration of image quality occurring in the each other's boundaries of transparent substrates by realizing the increasing in the size of the screen of an organic EL display, realizes the simplification of manufacturing work and the reduction of a manufacturing cost and maintains the periodicity of pixel arrays over the entire part of the screen even after manufacturing. SOLUTION: The plural organic thin-film EL elements 2 are formed on one sheet of the transparent substrate 1. Circuit boards 5 mounted with drive circuits 6 for supplying signals to signal electrodes and scanning electrodes of the elements 2 are tightly adhered and joined in correspondence to the respective elements 2. The circuit boards 5 consist of materials having sealability and have through-holes in the positions facing the signal electrodes and the scanning electrodes. These through-holes are filled with the materials having sealability and electrical conductivity. The signals are supplied to the signal electrodes and the scanning electrodes from the drive circuits 6 via the materials having the sealability and electrical conductivity. The segments not joined to the circuit boards 5 among the organic EL elements 2 are covered with the sealing materials 13.