公开(公告)号：EP2330784A1

公开(公告)日：2011-06-08

申请号：EP10192406.6

申请日：2010-11-24

Applicant: Dora S.p.A.

Inventor： Dell'Amico, Gabriele ,  Guerrini, Eleonora

IPC: H04L25/02 ,  H04L27/26

CPC classification number: H04L25/022 ,  H04L25/0224 ,  H04L27/2647 ,  H04L27/2655 ,  H04L27/2679

Abstract: An OFDM receiver includes a sampling circuit configured to sample an incoming signal received through a transmission channel and an estimation circuit configured to receive samples of the incoming signal and to estimate transmission channel response and eventual differences of synchronization offsets introduced at a receiver side. An equalizer may be coupled to the estimation circuit and configured to compensate an effect of the transmission channel response and of the differences of synchronization offsets on the received samples and to generate equalized samples. An OFDM detector may be configured to generate a stream of demodulated digital symbols based upon the equalized samples.

Abstract translation: OFDM接收机包括：采样电路，以样品被配置为经由传输信道与在被配置成接收输入信号的样本，并估算传输信道响应和在接收机侧导入的同步偏移的最终差异估计电路接收的输入信号。 均衡器可被耦合到所述估计电路并且被配置为补偿在传输信道响应的影响，同步偏移的所接收样本的差异，以产生均衡的样本。 的OFDM检测器可以被配置成基于经均衡的样本解调的数字符号流。

公开(公告)号：EP2251972A1

公开(公告)日：2010-11-17

申请号：EP10159984.3

申请日：2010-04-15

Applicant: STMicroelectronics S.r.l. ,  Dora S.p.A.

Inventor： Bagarelli, Fulvio Giacomo ,  Marano, Vincenzo ,  Poli, Enrico

IPC: H02P8/12 ,  H02P8/22

CPC classification number: H02P8/12 ,  H02P8/22

Abstract: A method of driving a stepper motor in feed-forward voltage mode, comprises the step of setting, for a desired speed to be impressed to the stepper motor, the amplitude of a sinusoidal phase voltage of the stepper motor equal to the sum of the expected back-electromotive force (BEMF) amplitude estimated in function of the desired speed, and the product between a desired amplitude of a phase current (Iphase) and an estimated absolute value of the motor impedance.
A relative system is also disclosed.

Abstract translation: 一种以前馈电压模式驱动步进电动机的方法，包括以下步骤：对步进电动机施加的期望速度，将步进电动机的正弦相电压的振幅设定为预期的 以期望速度的函数估计的反电动势（BEMF）幅度以及相电流（Iphase）的期望幅度与电动机阻抗的估计绝对值之间的乘积。 还公开了一种相关系统。

公开(公告)号：EP2202873A1

公开(公告)日：2010-06-30

申请号：EP09180576.2

申请日：2009-12-23

Applicant: Dora S.p.A.

Inventor： Bianco, Alberto ,  Saggini, Stefano ,  Olmo, Mauro

IPC: H02M3/156

CPC classification number: H02M3/156

Abstract: There is described a control device for a switching converter, said converter comprises at least one transistor (M10, M20) supplied by an input voltage (Vin) and being adapted to supply a load (LD) by means of an output voltage (Vo, Vod). The converter comprises means (100) adapted to turn on and off said at least one transistor (M10, M20). The control device comprises operation means (300, 400) adapted to change the state of said at least one transistor (M10, M20) from turned on to turned off or vice versa, respectively when the output voltage (Vo, Vod) goes down or goes up a first voltage (Vset, Vseton) of a given value (THR) by defining a first state; the operation means (300, 400) comprise further means adapted to generate a ramp signal (S1) and are adapted to change said first state of the at least one transistor (M10, M20) from turned on to turned off or vice versa when said ramp voltage (S1) is equal to the output voltage (Vo, Vod) of the converter.

Abstract translation: 描述了一种用于开关转换器的控制装置，所述转换器包括由输入电压（Vin）提供的至少一个晶体管（M10，M20），并且适于通过输出电压（Vo， VOD）。 转换器包括适于接通和断开所述至少一个晶体管（M10，M20）的装置（100）。 控制装置包括适于在输出电压（Vo，Vod）下降时分别改变所述至少一个晶体管（M10，M20）从导通断开或相反的状态的操作装置（300,400） 通过定义第一状态来上升给定值（THR）的第一电压（Vset，Vseton）; 操作装置（300,400）包括适于产生斜坡信号（S1）的另外的装置，并且适于将所述至少一个晶体管（M10，M20）的所述第一状态从导通改变为截止或反之亦然 斜坡电压（S1）等于转换器的输出电压（Vo，Vod）。

公开(公告)号：EP1583070A1

公开(公告)日：2005-10-05

申请号：EP04425227.8

申请日：2004-03-30

Applicant: STMicroelectronics S.r.l. ,  Dora S.p.A.

Inventor： Sala, Leonardo ,  Bagarelli, Fulvio ,  Gariboldi, Roberto

IPC: G09G3/36 ,  G09G3/20

CPC classification number: G09G3/3696 ,  G09G3/2011 ,  G09G3/3648 ,  G09G2310/027 ,  G09G2320/0219 ,  G09G2320/0276 ,  G09G2320/0673

Abstract: Described is a method for designing a structure for driving display devices.
In one embodiment the method for designing a structure for driving display devices comprises the steps of: considering the transmittance characteristics in relation to the voltage applied to a plurality of liquid crystal displays; defining a transmittance curve on the basis of the voltage applied to said liquid crystals, for each liquid crystal display of said plurality; applying a gamma correction, with different values of the gamma exponent, to each previously defined curve; applying a kickback correction to each previously defined curve; positioning a plurality of branch points along said curves; determining a resisitance value for each branch point and for each of said one curve for each display; choosing the value of minimum resistance for each branch point; choosing the value of maximum resistance per each branch point; calculating the difference between said value of minimum resistance for each branch point and said value of maximum resistance for each branch point; defining for each branch point a value of fixed resistance equal to said value of minimum resistance; defining for each branch point an interval of values for a variable resistance equal to said difference.

Abstract translation: 的方法创建的显示装置driverby步骤，包括：考虑到在关系的透射率特性的电压施加到多个液晶显示装置; 基于施加到所述显示器，每个显示器的电压的限定透射率曲线; 施加伽马校正，与伽马指数的不同的值，每个透射率曲线; 施加反冲校正每条曲线; 沿着所述曲线定位分支点; 确定性采矿每个分支点和用于为每个显示每条曲线的电阻值; 选择用于每个分支点的最小电阻值; 选择的每个分支点处的最大电阻值; 计算所述最低电阻值和每个分支点所述最大电阻值之间的差; - 定义为每个分支点处的固定电阻值等于所述最小电阻值; - 定义为值的间隔为等于所述差的可变电阻的每个分支点。

公开(公告)号：EP1365384A1

公开(公告)日：2003-11-26

申请号：EP02425326.2

申请日：2002-05-23

Applicant: STMicroelectronics S.r.l. ,  Dora S.p.A.

Inventor： Sala, Leonardo ,  Domanin, Daniele ,  Gariboldi, Roberto

IPC: G09G3/36

CPC classification number: G09G3/3625 ,  G09G3/2018 ,  G09G3/2022 ,  G09G2320/0247 ,  G09G2320/0266

Abstract: The present invention relates to a driving method for flat panel display devices, particularly a driving method combining a Multi Line Addressing (MLA) technique and a Frame Rate Control (FRC) technique, for flat panel display devices such as Liquid Crystal Display (LCD).
In an embodiment the method of driving an image display device comprises the following steps: dividing row electrodes of an image device, having a plurality of row electrodes and a plurality of column electrodes, into a plurality of subgroups; selecting one of the plurality of said subgroups having a prefixed number of electrodes; performing a grey scale display by a frame rate control (FRC) by using a prefixed number of frames and a prefixed number of bits representing the grey levels; decomposing one of said frame in a number of time instants proportional to said prefixed number of electrodes; putting the bits representing the grey levels equally distributed in said prefixed number of frames.

Abstract translation: 本发明涉及用于平板显示装置的驱动方法，特别是组合多行寻址（MLA）技术和帧速率控制（FRC）技术的驱动方法，用于诸如液晶显示器（LCD）的平板显示装置， 。 在一个实施例中，驱动图像显示装置的方法包括以下步骤：将具有多个行电极和多个列电极的图像装置的行电极分成多个子组; 选择所述多个所述子组中的一个具有预定数量的电极; 通过使用预定数量的帧和表示灰度级的前缀位数来执行帧速率控制（FRC）的灰度级显示; 在与所述预定数量的电极成比例的多个时刻中分解所述帧中的一个; 将表示灰度级的位平均分配在所述前缀数目的帧中。

公开(公告)号：EP2251972B1

公开(公告)日：2014-07-02

申请号：EP10159984.3

申请日：2010-04-15

Applicant: STMicroelectronics Srl ,  Dora S.p.A.

Inventor： Bagarelli, Fulvio Giacomo ,  Marano, Vincenzo ,  Poli, Enrico

IPC: H02P8/12 ,  H02P8/22

CPC classification number: H02P8/12 ,  H02P8/22

公开(公告)号：EP2270998A1

公开(公告)日：2011-01-05

申请号：EP10167642.7

申请日：2010-06-29

Applicant: Dora S.p.A. ,  STMicroelectronics S.r.l.

Inventor： Guerrieri, Lorenzo ,  Saccani, Emile ,  Lasciandare, Alessandro ,  Lotito, Arturo ,  Bisaglia, Paola

IPC: H04B3/54

CPC classification number: H04B3/542 ,  H04B2203/542 ,  H04B2203/5466

Abstract: The method transmits a long packet of digital data over a poly-phase power line affected by impulsive noise synchronous with phase voltages. Instead of using very complicated coding schemes, starting from the knowledge of the typical power line scenario, useful information is transmitted where noise synchronous with the main signal is absent. Time-intervals of a known or estimated duration during which the poly-phase power line is affected by impulsive noise are determined, and dummy data during the time-intervals, and useful data during other time-intervals free from impulsive noise, are transmitted.

Abstract translation: 该方法通过影响与相电压同步的脉冲噪声的多相电力线传输长数据数据。 代替使用非常复杂的编码方案，从典型电力线情景的知识开始，发送与主信号同步的噪声不存在的有用信息。 确定多相电力线受脉冲噪声影响的已知或估计持续时间的时间间隔，并且在时间间隔期间发送伪数据，以及在其它时间间隔内没有冲击噪声的有用数据。

公开(公告)号：EP2002556B1

公开(公告)日：2009-09-23

申请号：EP06745235.9

申请日：2006-03-17

Applicant: STMicroelectronics S.r.l. ,  Dora S.p.A.

Inventor： CAPPELLETTI Roberto ,  CANTONE Giuseppe ,  ANTONELLI Barbara ,  CASTIGLIOLA Antonello ,  LASCIANDARE Alessandro ,  MARANO Vincenzo

IPC: H04B3/54

CPC classification number: H04B3/54 ,  H04B2203/5416 ,  H04B2203/5425 ,  H04B2203/5433 ,  H04B2203/5458 ,  H04B2203/5491

Abstract: The invention relates to an electronic synchronous/ asynchronous transceiver device (100) for power line communication networks of the type integrated into a single chip and operating from a single supply voltage. The transceiver device includes: at least an internal register (40) that is programmable through a synchronous serial interface (41); at least a line driver for a two-way network communication over power lines implemented by a single ended power amplifier (45) with direct accessible input and output lines that is part of a tunable active filter for the transmission path; and at least a couple of linear regulators (30, 35) for powering with different voltage levels different kind of external controllers linked to the transceiver device (100).

公开(公告)号：EP1696542A1

公开(公告)日：2006-08-30

申请号：EP05425108.7

申请日：2005-02-28

Applicant: STMicroelectronics S.r.l. ,  Dora S.p.A.

Inventor： Pannizzo, Ivo ,  Pulvirenti, Francesco

IPC: H02M3/07

CPC classification number: H02M3/073

Abstract: The present invention describes a voltage multiplier receiving a constant voltage (Vs). The multiplier comprises means (1) suitable for generating at least one first (CK) and one second (XCK) signal in phase opposition between each other and at least one charging section (100, Ai). The latter comprises a first capacitor (C1) of charge transfer having a first terminal coupled to the first signal (CK) and a second capacitor (C2) of charge transfer having a first terminal coupled with the second signal (XCK). The two capacitors (C1, C2) of charge transfer comprise respective parasitic capacitances (Cp1, Cp2) placed between their first terminal and a reference voltage (GND) and the at least one charging section (100, Ai) is coupled with said constant voltage (Vs) and is suitable for producing in output a multiple voltage of the constant voltage. The multiplier comprises output means (OUT, Cs) receiving said multiple voltage of the input voltage and being suitable for supplying a substantially constant output voltage (Vout) which is multiple of the constant voltage (Vs). The multiplier comprises means (10) suitable for connecting the parasitic capacitances (Cp1, Cp2) to carry out the charge transfer from one parasitic capacitance to the other.

Abstract translation: 本发明描述了接收恒定电压（Vs）的电压倍增器。 乘法器包括适于产生彼此相对的至少一个第一（CK）和一个第二（XCK）信号的装置（1）和至少一个充电部分（100A）。 后者包括电荷转移的第一电容器（C1），其具有耦合到第一信号（CK）的第一端子和具有与第二信号（XCK）耦合的第一端子的电荷转移的第二电容器（C2）。 电荷转移的两个电容器（C1，C2）包括放置在它们的第一端子和参考电压（GND）之间的相应的寄生电容（Cp1，Cp2），并且至少一个充电部分（100，Ai）与所述恒定电压 （Vs），并且适用于在输出中产生恒定电压的多个电压。 乘法器包括接收输入电压的多个电压的输出装置（OUT，Cs），并且适于提供恒定电压（Vs）的倍数的基本恒定的输出电压（Vout）。 乘法器包括适于连接寄生电容（Cp1，Cp2）的装置（10），以执行从一个寄生电容到另一个寄生电容的电荷转移。

公开(公告)号：EP1518219A1

公开(公告)日：2005-03-30

申请号：EP03740320.1

申请日：2003-06-23

Applicant: STMicroelectronics S.r.l. ,  Dora S.p.A.

Inventor： PAPPALARDO, Salvatore ,  PULVIRENTI, Francesco ,  PRIVITERA, Salvatore ,  SALA, Leonardo

IPC: G09G3/36

CPC classification number: G09G3/3681 ,  G09G3/3674

Abstract: The present invention describes a system for driving rows of a liquid crystal display comprising at least one module (10) for driving one single row of the liquid crystal display. The module comprises an inverter (T11-T12) operating in a supply path between a first (21) and a second (22) supply line of the system, where the first supply line (21) comprises first means (S1) capable of connecting it to a first (VLCD) or to a second (VA) supply voltage and the second supply line (22) comprises second means (S2) capable of connecting it to a third (VB) or to a fourth (VSS) supply voltage. The inverter (T11-T12) is driven by a logic circuitry (11-12) and sends in output (OUT) a drive signal for one single row of the liquid crystal display.