公开(公告)号：KR1020130099496A

公开(公告)日：2013-09-06

申请号：KR1020120021059

申请日：2012-02-29

Applicant: 삼성전자주식회사

Inventor： 조용성 ,  최기환 ,  박일한 ,  송기환 ,  윤상용

IPC: G11C16/34 ,  G11C16/10

CPC classification number: G11C7/04 ,  G11C16/0483 ,  G11C16/10

Abstract: PURPOSE: A non-volatile memory device and a memory system including the same reduce erasure disturbance by varying a program pulse period according to temperature change, the physical position of a word line, a program voltage, and/or a program-erasure cycle. CONSTITUTION: A program voltage (Vpgm) is supplied to a selected word line (Selected WL). A pass voltage is supplied to unselected word lines (Unselected WL). A program pulse period where the program voltage is constantly maintained is controlled by temperature change. The program pulse period is increased when the temperature is decreased, and the program pulse period is decreased when the temperature is increased. The program pulse period determined by the temperature change is additionally changed by the physical position of the selected word line.

Abstract translation: 目的：通过根据温度变化，字线的物理位置，程序电压和/或程序擦除循环改变编程脉冲周期来减少擦除干扰的非易失性存储器件和存储器系统。 构成：将程序电压（Vpgm）提供给选定的字线（选定的WL）。 向未选择的字线（未选择WL）提供通过电压。 通过温度变化来控制编程电压不断维持的编程脉冲期间。 当温度降低时，编程脉冲周期增加，并且当温度升高时编程脉冲周期减小。 由温度变化确定的编程脉冲周期由所选字线的物理位置附加地改变。

公开(公告)号：KR1020130099495A

公开(公告)日：2013-09-06

申请号：KR1020120021058

申请日：2012-02-29

Applicant: 삼성전자주식회사

Inventor： 이남희 ,  박광일 ,  박일한 ,  서성환 ,  최기환

IPC: G11C16/34 ,  G11C16/10

CPC classification number: G11C16/3459 ,  G11C11/5628 ,  G11C16/10 ,  G11C2211/5621

Abstract: PURPOSE: A non-volatile memory device and a memory system including the same improve the distribution of a threshold voltage by biasing a bulk to a negative voltage during a programming operation and/or a verification operation. CONSTITUTION: A program execution period is performed to supply a program voltage to a selected word line. A verification period is performed to supply a verification voltage to the selected word line. A negative voltage as a well bias voltage (Vbb) is supplied to a pocket well in which memory cells are formed during the verification period. The negative voltage or a ground voltage as the well bias voltage is supplied to the pocket well during the program execution period.

Abstract translation: 目的：非易失性存储器件和包括其的存储器系统在编程操作和/或验证操作期间通过将体积偏压到负电压来改善阈值电压的分布。 构成：执行程序执行周期以将编程电压提供给所选择的字线。 执行验证周期以向所选择的字线提供验证电压。 作为阱偏置电压（Vbb）的负电压被提供到在验证期间形成存储器单元的口袋中。 在程序执行期间，阱电压被提供给口袋中的负电压或接地电压。

公开(公告)号：KR1020130085154A

公开(公告)日：2013-07-29

申请号：KR1020120006098

申请日：2012-01-19

Applicant: 삼성전자주식회사

Inventor： 박일한 ,  조용성 ,  박상수

IPC: G11C16/34 ,  G11C16/10

CPC classification number: G11C16/10 ,  G11C16/24 ,  G11C16/3427

Abstract: PURPOSE: A non-volatile memory device, a non-volatile memory system including thereof, a program method thereof, and a controller operation method controlling thereof are provided to perform the program operation by reducing the program disturbance. CONSTITUTION: A flash memory device (1100) comprises a coupling program controlling unit (1165). A first memory cell programs a first data pattern. A second memory cell programs by using the program voltage. By using the verification voltage which corresponds to the first data pattern, the programming of the first data pattern of the first memory cell is verified. If the verification result of the first memory cell is 'pass', the program of the second memory cell is completed.

Abstract translation: 目的：提供一种非易失性存储器件，包括其的非易失性存储器系统，其程序方法及其控制器操作方法，以通过减少程序干扰来执行程序操作。 构成：闪存装置（1100）包括耦合程序控制单元（1165）。 第一存储器单元编程第一数据模式。 第二个存储单元通过使用程序电压进行编程。 通过使用对应于第一数据模式的验证电压，验证第一存储单元的第一数据模式的编程。 如果第一存储单元的验证结果为“通过”，则第二存储单元的程序完成。