公开(公告)号：KR1020090084487A

公开(公告)日：2009-08-05

申请号：KR1020080010703

申请日：2008-02-01

Applicant: 삼성전자주식회사

Inventor： 정우석

IPC: H04N19/895 ,  H04N19/89 ,  H04N19/176 ,  H04W88/02

CPC classification number: H04N19/895 ,  H04N19/176 ,  H04N19/89 ,  H04W88/02

Abstract: A portable terminal and an error concealing method are provided to conceal the error caused by image packet loss when demodulating an image packet, which is formed by dividing/compressing an image frame of the H.264 type into block, into the image frame. A wireless communication unit(110) receives an image packet. A controller(150) demodulates the received image packet into an image frame, and then determines the kind of image frame. If the image frame is an inter frame, the controller applies an error concealing algorithm into the image frame according to macro blocks forming the inter frame.

Abstract translation: 提供便携式终端和错误隐藏方法，以便在将通过将H.264类型的图像帧分割/压缩到块中而形成的图像分组解调成图像帧时，隐藏由图像分组丢失引起的误差。 无线通信单元（110）接收图像分组。 控制器（150）将接收到的图像分组解调为图像帧，然后确定图像帧的种类。 如果图像帧是帧间帧，则控制器根据形成帧间的宏块将错误隐藏算法应用于图像帧。

公开(公告)号：KR100752600B1

公开(公告)日：2007-08-29

申请号：KR1020010044295

申请日：2001-07-23

Applicant: 삼성전자주식회사

Inventor： 정우석 ,  김현재 ,  황장원 ,  문규선 ,  박태형 ,  강숙영

IPC: H01L29/786

CPC classification number: H01L27/1288 ,  G02F1/136227 ,  G02F2001/136236 ,  H01L27/1214

Abstract: A polycrystalline silicon TFT for an LCD and a manufacturing method thereof is disclosed. The TFT comprises an active pattern formed on a substrate, a gate insulating layer formed on the substrate including the active pattern, a gate line formed on the gate insulating layer to be crossed with the active pattern and including a gate electrode for defining the first impurity region, a second impurity region and a channel region, an insulating interlayer formed on the gate insulating layer including the gate line, a data line formed on the insulating interlayer and connected to the second impurity region through the first contact hole which is formed through the gate insulating layer and the insulating interlayer on the second impurity region and a pixel electrode formed on the same insulating interlayer as the data line and connected with the first impurity region through a second contact hole which is formed through the gate insulating layer and the insulating interlayer on the first impurity region. The number of mask can be reduced to 5 or 6 sheets, thereby simplifying a manufacturing process.

公开(公告)号：KR100486900B1

公开(公告)日：2005-07-07

申请号：KR1019980021199

申请日：1998-06-09

Applicant: 삼성전자주식회사

Inventor： 권오경 ,  이인환 ,  최병덕 ,  정우석

IPC: G02F1/133 ,  G02F1/136

Abstract: 본 발명은 열 반전 구동 수준의 저소비전력으로 점 반전 구동 수준의 고화질을 구현할 수 있는 새로운 패널 구조를 갖는 액정 표시장치에 관한 것이다.
본 발명은 화상신호를 전달하는 N개의 신호선과, 상기 신호선과 행렬식으로 배열되어 스캔 펄스신호를 전달하는 M개의 게이트선과, N개의 열과 M개의 행으로 이루어지며, 각각 상기 화상신호의 전압레벨에 따라 광투과율이 변화하는 액정과 상기 신호선의 화상신호를 상기 액정에 전달하는 화소 스위칭소자를 포함하고 상기 게이트선과 상기 신호선의 교차점에 위치하는 N×M개의 액정 셀을 포함하여 구성되고, 상기 액정 셀은 홀수 번째 행에서 i번째 열의 화소 스위칭소자와 i번째 열의 신호선이 연결되고, 짝수 번째 행에서 i번째 열의 화소 스위칭소자와 (i+1)번째 열의 신호선이 연결되어 구성된 새로운 액정 표시 패널을 제공하며, 또한 상기한 액정 표시패널에 대하여 한 프레임동안 이웃한 신호선들의 극성을 서로 다르게 유지하고 다음 프레임에서 � �들 신호선의 극성을 반전시켜 구동하는 액정 표시장치를 제공하는 것이다.

公开(公告)号：KR1020040042414A

公开(公告)日：2004-05-20

申请号：KR1020020070708

申请日：2002-11-14

Applicant: 삼성전자주식회사

Inventor： 정우석 ,  황장원

IPC: G02F1/136

CPC classification number: H01L27/124

Abstract: PURPOSE: A polysilicon thin film transistor of a thin film transistor panel and a method for forming the polysilicon thin film transistor are provided to prevent electrostatic breakdown generated when ion doping is carried out. CONSTITUTION: N-type and P-type active layers are formed on a transparent insulating panel. The N-type active layers include the first and second N-type active layers(151a,151b) and the P-type active layers include the first and second P-type active layers(152a,152b). A gate insulating layer is formed on the N-type and P-type active layers and gate lines are formed on the gate insulating layer. The gate lines include the first gate line partially superposed on the first or second N-type active layer, the second gate line partially superposed on the first or second P-type active layer, and the third gate line partially superposed on the first and second N-type active layers and the first and second P-type active layers. The first and second gate lines respectively includes the first parts(121a,122a) superposed on the active layers, the second parts(121b,122b) that are not superposed on the active layers, and gate connectors(121c,122c) for connecting the first parts to the second parts.

Abstract translation: 目的：提供薄膜晶体管板的多晶硅薄膜晶体管和形成多晶硅薄膜晶体管的方法，以防止进行离子掺杂时产生的静电击穿。 构成：在透明绝缘板上形成N型和P型有源层。 N型有源层包括第一和第二N型有源层（151a，151b），P型有源层包括第一和第二P型有源层（152a，152b）。 在N型和P型有源层上形成栅极绝缘层，栅极绝缘层上形成栅极线。 栅极线包括部分地重叠在第一或第二N型有源层上的第一栅极线，部分地叠置在第一或第二P型有源层上的第二栅极线，以及部分地重叠在第一和第二N型有源层上的第三栅极线 N型有源层和第一和第二P型有源层。 第一和第二栅极线分别包括叠置在有源层上的第一部分（121a，122a），不叠置在有源层上的第二部分（121b，122b）和用于连接 第一部分到第二部分。

公开(公告)号：KR1020040031517A

公开(公告)日：2004-04-13

申请号：KR1020020060985

申请日：2002-10-07

Applicant: 삼성전자주식회사

Inventor： 정우석 ,  황장원

IPC: G02F1/136

CPC classification number: G02F1/136 ,  G02F2001/13625 ,  G02F2001/136295 ,  H01L27/1214 ,  H01L29/786

Abstract: PURPOSE: A method for fabricating a thin film transistor substrate is provided to prevent thin film transistors from being damaged due to static electricity. CONSTITUTION: An amorphous silicon layer is formed on a transparent insulating substrate(110) and heat-treated, to form a polysilicon layer. The polysilicon layer is patterned to form the first and second polysilicon patterns. A gate insulating layer(140) is formed on the first and second polysilicon patterns, and the first metal layer for forming a gate line is formed on the gate insulating layer. The first metal layer is selectively etched to expose a portion of the gate insulating layer, which corresponds to the first polysilicon pattern. An N-type impurity is doped into the first polysilicon pattern to form an N-type active layer(151). The first metal layer is selectively etched to expose a portion of the gate insulating layer, which corresponds to the second polysilicon pattern. A P-type impurity is doped into the second polysilicon pattern to form a P-type active layer(152). The first metal layer is selectively etched to form the gate line(121). An insulating material is coated on the gate line and patterned to form an interlevel insulating layer having the first through eighth contact holes that expose the N-type or P-type active layer. A data line is formed on the interlevel insulating layer.

Abstract translation: 目的：提供一种制造薄膜晶体管基板的方法，以防止薄膜晶体管由于静电而被损坏。 构成：在透明绝缘基板（110）上形成非晶硅层并进行热处理，形成多晶硅层。 图案化多晶硅层以形成第一和第二多晶硅图案。 在第一和第二多晶硅图案上形成栅极绝缘层（140），并且在栅极绝缘层上形成用于形成栅极线的第一金属层。 选择性地蚀刻第一金属层以暴露对应于第一多晶硅图案的栅极绝缘层的一部分。 在第一多晶硅图案中掺杂N型杂质以形成N型有源层（151）。 选择性地蚀刻第一金属层以暴露对应于第二多晶硅图案的栅极绝缘层的一部分。 将P型杂质掺杂到第二多晶硅图案中以形成P型有源层（152）。 选择性地蚀刻第一金属层以形成栅极线（121）。 绝缘材料被涂覆在栅极线上并图案化以形成具有暴露N型或P型有源层的第一至第八接触孔的层间绝缘层。 在层间绝缘层上形成数据线。

公开(公告)号：KR100424648B1

公开(公告)日：2004-03-24

申请号：KR1020010010607

申请日：2001-02-28

Applicant: 삼성전자주식회사

Inventor： 정우석

IPC: H04W4/12

Abstract: PURPOSE: A method for automatically transmitting the E-mail of a specific message in a mobile terminal is provided to automatically transmit detailed matters related to a schedule registered in a user's mobile terminal to the user or another user's E-mail account. CONSTITUTION: If a mobile terminal user inputs a date, a hour, and associated contents for a specific schedule(301), the control part of the mobile terminal judges whether an E-mail automatic transmission menu is selected(302). If the E-mail automatic transmission menu is selected by the user, the control part receives E-mail contents and an address from the user(303). If the inputted schedule date and hour comes, the control part transmits the E-mail having the contents related to the schedule to the inputted E-mail account according to the schedule(304).

Abstract translation: 目的：提供一种用于在移动终端中自动发送特定消息的电子邮件的方法，以将与在用户的移动终端中登记的时间表有关的详细事项自动发送给用户或另一用户的电子邮件账户。 组成：如果移动终端用户输入日期，时间和关于特定时间表的相关内容（301），则移动终端的控制部分判断是否选择了电子邮件自动发送菜单（302）。 如果用户选择了电子邮件自动发送菜单，则控制部分从用户接收电子邮件内容和地址（303）。 如果输入的时间表日期和时间到来，则控制部分根据时间表将具有与时间表有关的内容的电子邮件发送到输入的电子邮件帐户（304）。

公开(公告)号：KR1020030066057A

公开(公告)日：2003-08-09

申请号：KR1020020006212

申请日：2002-02-04

Applicant: 삼성전자주식회사

Inventor： 박태형 ,  정우석

IPC: G02F1/136

Abstract: PURPOSE: A thin film transistor substrate, and a method for manufacturing the same and a liquid crystal display are provided to directly connect short points with a wire layer, thereby preventing the short points from corroding due to corrosion of a pixel electrode layer. CONSTITUTION: A first insulating substrate(10) has a display area and a peripheral area. A plurality of gate lines(21) are formed on the first insulating substrate. A plurality of data lines(81) cross the gate lines. Thin film transistors are electrically connected to the gate lines and the data lines. A reference potential wire is formed at the peripheral area of the first insulating substrate. The reference potential wire is formed of the same material as the gate lines or the data lines at the same layer, and includes a reference potential lead wire and short point pads formed of first and second metal layers(22,82). A passivation film(100) is formed on the thin film transistors and the data lines, and has first and second contact holes exposing drain electrodes(90) of the thin film transistors and the short point pads. Pixel electrodes(140) are formed on the passivation film and connected to the drain electrodes through the first contact holes. Short points(200) are formed on the passivation film and connected to the short point pads through the second contact holes.

Abstract translation: 目的：提供薄膜晶体管基板及其制造方法和液晶显示器，以将短路点与线层直接连接，从而防止由于像素电极层的腐蚀而引起的短路腐蚀。 构成：第一绝缘基板（10）具有显示区域和外围区域。 多个栅极线（21）形成在第一绝缘基板上。 多条数据线（81）与栅极线交叉。 薄膜晶体管电连接到栅极线和数据线。 在第一绝缘基板的周边区域形成参考电位线。 参考电位线由与同一层上的栅极线或数据线相同的材料形成，并且包括由第一和第二金属层（22,82）形成的参考电位引线和短点焊盘。 钝化膜（100）形成在薄膜晶体管和数据线上，并且具有暴露薄膜晶体管的漏电极（90）和短点焊盘的第一和第二接触孔。 像素电极（140）形成在钝化膜上并通过第一接触孔连接到漏电极。 在钝化膜上形成短点（200），并通过第二接触孔与短点焊盘相连。

公开(公告)号：KR1020030059593A

公开(公告)日：2003-07-10

申请号：KR1020020000179

申请日：2002-01-03

Applicant: 삼성전자주식회사

Inventor： 강명구 ,  김현재 ,  강숙영 ,  정우석

IPC: G02F1/136

CPC classification number: H01L29/42384 ,  G02F1/13454 ,  G02F2202/104 ,  H01L21/02675 ,  H01L21/2026 ,  H01L29/78675

Abstract: PURPOSE: A thin film transistor and a liquid crystal display are provided to increase the mobility of electric charges without increasing the size of a driving circuit part, and to obtain the uniformity of the mobility of electric charges between thin film transistors. CONSTITUTION: Semiconductor patterns are formed of a polycrystalline silicon thin film formed by crystal grains growing on an insulating substrate. A gate electrode(G) formed on the semiconductor patterns includes a first area parallel with a growth direction of the crystal grains, a second and third areas connected to both sides of the first area and vertical to the growth direction of the crystal grains. The semiconductor patterns include a channel area, and a source area and a drain area placed on both sides of the channel area. If gate on voltage is applied to the gate electrode, a channel is formed at the semiconductor patterns to move electric charges through the channel. If data voltage is applied to the source area, the electric charges of the source area move to the drain area through the channel.

Abstract translation: 目的：提供薄膜晶体管和液晶显示器，以增加电荷的迁移率，而不增加驱动电路部分的尺寸，并获得薄膜晶体管之间的电荷迁移率的均匀性。 构成：半导体图案由在绝缘基板上生长的晶粒形成的多晶硅薄膜形成。 形成在半导体图案上的栅电极（G）包括与晶粒的生长方向平行的第一区域，与第一区域的两侧连接且垂直于晶粒的生长方向的第二区域和第三区域。 半导体图案包括沟道区域，以及放置在沟道区域两侧的源极区域和漏极区域。 如果栅极电压施加到栅电极，则在半导体图案处形成沟道以通过沟道移动电荷。 如果数据电压施加到源极区域，则源区域的电荷通过通道移动到漏极区域。

公开(公告)号：KR1020030059522A

公开(公告)日：2003-07-10

申请号：KR1020010088386

申请日：2001-12-29

Applicant: 삼성전자주식회사

Inventor： 정우석

IPC: H04B1/38

CPC classification number: H04L12/12 ,  H04L67/04 ,  H04L67/18 ,  H04L69/329 ,  H04W4/90 ,  H04W76/50

Abstract: PURPOSE: A method for requesting emergency rescue in a mobile communication terminal having a Bluetooth is provided to calculate position information of the mobile communication terminal and enter in a sleep state, when emergency situation occurs. CONSTITUTION: A control unit of a mobile communication terminal judges whether an emergency key is inputted by a user(501). If the emergency key is inputted, the control unit receives position data through a GPS(Global Positioning System) satellite(503), and transmits the received position data to a base station through a data burst message(505). The control unit receives a message including position information of the mobile communication terminal(507). The control unit analyzes the received message, and acquires position information(509). The control unit controls a power supply unit, blocks a driving voltage provided to each composing element of the mobile communication terminal, and turns into a sleep state(511). The control unit generates an emergency report message to be transmitted to a Bluetooth device(513).

Abstract translation: 目的：提供一种在具有蓝牙的移动通信终端中请求紧急救援的方法，用于计算当紧急情况发生时移动通信终端的位置信息并进入睡眠状态。 构成：移动通信终端的控制单元判断用户是否输入了紧急密钥（501）。 如果紧急钥匙被输入，则控制单元通过GPS（全球定位系统）卫星（503）接收位置数据，并通过数据脉冲串消息（505）将接收到的位置数据发送到基站。 控制单元接收包括移动通信终端（507）的位置信息的消息。 控制单元分析接收到的消息，并获取位置信息（509）。 控制单元控制电源单元，阻止提供给移动通信终端的每个组成元件的驱动电压，并变为睡眠状态（511）。 控制单元生成要发送到蓝牙装置的紧急报告消息（513）。

公开(公告)号：KR1020030033566A

公开(公告)日：2003-05-01

申请号：KR1020010065606

申请日：2001-10-24

Applicant: 삼성전자주식회사

Inventor： 정우석

IPC: G02F1/133

Abstract: PURPOSE: A DRAM type pixel circuit of a liquid crystal display device is provided to drive liquid crystal in a dynamic operation mode in the normal mode while carrying out refresh to a frequency lower than 4Hz without any operation of a driving circuit in a still picture mode, thereby reducing the power consumption. CONSTITUTION: A DRAM type pixel circuit of a liquid crystal display device includes first to fourth NMOS transistors(NM1-NM3), first and second PMOS transistors(PM1,PM2), a storage capacitor(C), and pixel electrodes(PE). The first NMOS transistor has a first current electrode connected to a signal line, a second current electrode connected to a first node(N1), and a control electrode connected to a gate line. The storage capacitor is connected between the first node and a common voltage line(VCOM). The second NMOS transistor has a first current electrode connected to the first node, a second current electrode connected to a pixel electrode, and a control electrode connected to a mode control line(306). The first PMOS transistor has a first current electrode connected to a second node, a second current electrode connected to the pixel electrode, and a control electrode connected to the mode control line. The second PMOS transistor has a second current electrode connected to a driving voltage line(308) and a control electrode connected to the first node. The third NMOS transistor has a first current electrode connected to a pixel voltage line, a second current electrode connected to the second node, and a control electrode connected to the second current electrode of the second PMOS transistor. The fourth NMOS transistor has a first current electrode connected to the common voltage line, a second current electrode connected to the second node, and a control electrode connected to the first node.

Abstract translation: 目的：提供一种液晶显示装置的DRAM型像素电路，用于在正常模式下以动态操作模式驱动液晶，同时在静止图像模式下不进行驱动电路的任何操作，而刷新到低于4Hz的频率 ，从而降低功耗。 构成：液晶显示装置的DRAM型像素电路包括第一至第四NMOS晶体管（NM1-NM3），第一和第二PMOS晶体管（PM1，PM2），存储电容器（C）和像素电极（PE）。 第一NMOS晶体管具有连接到信号线的第一电流电极，连接到第一节点（N1）的第二电流电极和连接到栅极线的控制电极。 存储电容器连接在第一节点和公共电压线（VCOM）之间。 第二NMOS晶体管具有连接到第一节点的第一电流电极，连接到像素电极的第二电流电极和连接到模式控制线（306）的控制电极。 第一PMOS晶体管具有连接到第二节点的第一电流电极，连接到像素电极的第二电流电极和连接到模式控制线的控制电极。 第二PMOS晶体管具有连接到驱动电压线（308）的第二电流电极和连接到第一节点的控制电极。 第三NMOS晶体管具有连接到像素电压线的第一电流电极，连接到第二节点的第二电流电极和连接到第二PMOS晶体管的第二电流电极的控制电极。 第四NMOS晶体管具有连接到公共电压线的第一电流电极，连接到第二节点的第二电流电极和连接到第一节点的控制电极。