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公开(公告)号：KR102083222B1
公开(公告)日：2020-03-02
申请号：KR1020160098699
申请日：2016-08-03
Applicant: 에스케이하이닉스 주식회사 , 서울대학교산학협력단
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公开(公告)号：KR102001692B1
公开(公告)日：2019-07-18
申请号：KR1020140124056
申请日：2014-09-18
Applicant: 에스케이하이닉스 주식회사 , 서울대학교산학협력단
IPC: G11C11/4076 , G11C7/22 , H03L7/081
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公开(公告)号：KR101809996B1
公开(公告)日：2017-12-19
申请号：KR1020160054171
申请日：2016-05-02
Applicant: 서울대학교산학협력단
Abstract: 본발명은깜빡임현상이개선된 LED 조명장치에관한것으로, 두개의병렬연결되는컨버터방식의 LED 구동회로를활용하여항상 LED 부하(load)에거의일정한전류를공급함으로써, AC입력전원을사용할경우발생할수 있는깜빡임(flicker) 현상을제거하고, 동시에높은역률(power factor)을달성할수 있도록한 것이다.
Abstract translation: 本发明涉及一种改善闪烁效应的LED照明装置，其利用两个并联连接的转换器型LED驱动电路一直向LED负载提供恒定电流， 闪烁现象，同时实现高功率因数。
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公开(公告)号：KR1020170130707A
公开(公告)日：2017-11-29
申请号：KR1020160061213
申请日：2016-05-19
Applicant: 에스케이하이닉스 주식회사 , 서울대학교산학협력단
CPC classification number: H03K4/501 , H03K5/1534
Abstract: 본기술에의한삼각파발생장치는제어신호와클록신호를입력받아삼각파를출력하는삼각파생성부; 및보정모드에서제어신호를결정하는삼각파제어부를포함한다.
Abstract translation: 根据本技术的三角波产生装置是接收控制信号并输出的三角波发生器的时钟信号的三角波; 以及用于在校正模式下确定控制信号的三角波控制单元。
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公开(公告)号：KR1020160060873A
公开(公告)日：2016-05-31
申请号：KR1020140162850
申请日：2014-11-20
Applicant: 에스케이하이닉스 주식회사 , 서울대학교산학협력단
IPC: G11C11/4076 , G11C11/4063 , G11C7/22 , G11C11/4074 , G11C8/18 , G11C5/14
CPC classification number: H03K5/1532 , H03K5/133 , G11C11/4076 , G11C5/147 , G11C7/22 , G11C8/18 , G11C11/4063 , G11C11/4074
Abstract: 본기술에의한반도체장치는지연제어신호에따라데이터스트로브신호를지연하여지연데이터스트로브신호를출력하는가변지연부, 지연데이터스트로브신호에동기하여기준전압과데이터신호를비교하여데이터신호의논리레벨을결정하는데이터샘플러; 및트레이닝패턴을가지는데이터신호가입력되는경우데이터샘플러의출력에따라지연제어신호와상기기준전압을결정하는제어부를포함할수 있다.
Abstract translation: 根据本发明的半导体器件可以包括可变延迟部分，其根据延迟控制信号延迟数据选通信号并输出延迟数据选通信号; 与延迟数据选通信号同步的数据采样器比较参考电压和数据信号，并确定数据信号的逻辑电平; 以及控制部件，当输入具有训练图案的数据信号时，根据数据采样器的输出来确定参考电压和延迟控制信号。 所以，数据可以正常读取。
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Patent Agency Ranking
公开(公告)号：KR101092699B1
公开(公告)日：2011-12-09
申请号：KR1020100042733
申请日：2010-05-07
Applicant: 서울대학교산학협력단
IPC: H03K19/0948 , H03F3/70 , H03F3/45
CPC classification number: H03F3/70 , H03F3/45179 , H03F2203/45512
Abstract: 본발명은캐스코드연결된한 쌍의 PMOS 트랜지스터의각각의게이트사이와, 캐스코드연결된한 쌍의 NMOS 트랜지스터의각각의게이트사이에부트스트랩캐패시터를설치하고, 데이터샘플링단계(Φ)에서는전류기근을통해 PMOS 트랜지스터와 NMOS 트랜지스터를모두약반전동작시켜부트스트랩캐패시터에입력전압(V)과기준전압(V, V) 사이의전위차에대응된전하를저장하였다가, 전하전달단계(Φ)에서는입력전압이극성에따라 NMOS 트랜지스터쌍 또는 PMOS 트랜지스터쌍 중어느한 쌍을강반전으로구동하고다른한 쌍은컷오프동작하도록하여넓은대역폭을확보하도록하고, 전하전달후 정상상태단계(Φ)에서는 PMOS 트랜지스터와 NMOS 트랜지스터를모두약반전회귀시켜높은이득과함께전력소모를방지하는방식을제공한다.
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公开(公告)号：KR1020110132043A
公开(公告)日：2011-12-07
申请号：KR1020100051836
申请日：2010-06-01
Applicant: 서울대학교산학협력단
IPC: G02F1/1337
CPC classification number: G02F1/133753 , G02F2201/501
Abstract: PURPOSE: A liquid crystal display device, a manufacturing method thereof, and a method for manufacturing a liquid crystal aligned substrate are provided to obtain a wide viewing angle by implementing multi-domain using a protection layer with fluorine polymer. CONSTITUTION: A second substrate(2) faces a first substrate(1). A first vertically aligned layer(10) is located on the first substrate and includes a first region with a first alignment direction and a second region with a second alignment direction. A second vertically aligned layer(20) is located on the second substrate and includes a third region with a third alignment direction and a fourth region with a fourth alignment direction.
Abstract translation: 目的：提供一种液晶显示装置及其制造方法以及液晶取向基板的制造方法，通过利用氟聚合物保护层实现多域来获得宽视角。 构成：第二衬底（2）面向第一衬底（1）。 第一垂直取向层（10）位于第一基板上，并且包括具有第一取向方向的第一区域和具有第二取向方向的第二区域。 第二垂直取向层（20）位于第二基板上，并且包括具有第三取向方向的第三区域和具有第四取向方向的第四区域。
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公开(公告)号：KR1020100088653A
公开(公告)日：2010-08-10
申请号：KR1020097023582
申请日：2009-01-22
Applicant: (주)글로넷시스템즈 , 서울대학교산학협력단
CPC classification number: H03L7/0995 , H03L7/0807 , H04L7/0079 , H04L7/033 , H04L7/0331
Abstract: PURPOSE: All-digital clock data recovery device and a transceiver implemented thereof are provided to digitalize the whole of a clock data restoring unit by implementing a charge pump circuit and a voltage controlled generator with a digital circuit. CONSTITUTION: A phase detector(10) samples serial data. A phase detector outputs the digital signal sequence of data and edge. A deserializer changes the digital signal sequence into a bus signal. A digital controlled oscillator(200) is comprised of a multi-stage inverter chain. The digital controlled oscillator comprises a variable resistance switching matrix the digital controlled oscillator generates a clock having an adjusted oscillation frequency. The digital controlled oscillator provides a clock to the phase detector.
Abstract translation: 目的：提供全数字时钟数据恢复装置及其实现的收发器，通过实现电荷泵电路和具有数字电路的电压控制发生器来数字化整个时钟数据恢复单元。 构成：相位检测器（10）对串行数据进行采样。 相位检测器输出数字信号的数据和边沿。 解串器将数字信号序列改变为总线信号。 数字控制振荡器（200）由多级反相器链组成。 数字控制振荡器包括可变电阻开关矩阵，数字控制振荡器产生具有调整的振荡频率的时钟。 数字控制振荡器为相位检测器提供时钟。
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公开(公告)号：KR1020100071888A
公开(公告)日：2010-06-29
申请号：KR1020090076788
申请日：2009-08-19
Applicant: 삼성전자주식회사 , 서울대학교산학협력단
Abstract: PURPOSE: A variable capacitor, a digitally controlled oscillator, and a digital phase locked loop are provided to minimize the size of capacitance by connection a plurality of capacitor groups in parallel. CONSTITUTION: A capacitor unit(110) includes a plurality of capacitor groups which are arranged in a matrix shape. Based on line/ row selection signal with respect to the matrix, a switch unit(120) connects the capacitor groups in parallel and adjusts capacitance. A first capacitor sub-group has a first capacitance. A second capacitor sub-group has other capacitance which is different from the first capacitance. An adjust unit(130) selects the capacitor groups based on the size of the capacitances.
Abstract translation: 目的：提供可变电容器，数字控制振荡器和数字锁相环，以通过并联连接多个电容器组来最小化电容的尺寸。 构成：电容器单元（110）包括以矩阵形状排列的多个电容器组。 基于相对于矩阵的线/行选择信号，开关单元（120）并联连接电容器组并调整电容。 第一电容器子组具有第一电容。 第二电容器子组具有与第一电容不同的其它电容。 调整单元（130）基于电容的大小来选择电容器组。
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