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41.发明公开인체 영역 네트워크(Ｂｏｄｙ Ａｒｅａ Ｎｅｔｗｏｒｋ)의 통신 프레임 생성 방법 및 이를 이용하는 인체 영역 네트워크의 통신 방법 无效生产身体网络通信框架的方法及使用该方法的身体网络通信方法
公开(公告)号：KR1020110040682A
公开(公告)日：2011-04-20
申请号：KR1020100096343
申请日：2010-10-04
Applicant: 한국전자통신연구원
IPC: H04B13/00
CPC classification number: A61B5/0024
Abstract: PURPOSE: A method for producing a communication frame of a body area network, and a communication method of a body area network using the same are provided to enable plural body area terminals to coexist in a narrow space without communication interference. CONSTITUTION: A method for producing a communication frame of a body area network comprises the steps of: detecting the number of terminals which exist in a predetermined area(310); allocating individual frames to use each terminal existing in the predetermined region according to the number of the detected terminals(320); and allocating a transmission co-existence frame to all terminals existing the predetermined region according to the number of the detected terminals(330), wherein the co-existence frame includes the allocation information on the individual frame used by each terminal.
Abstract translation: 目的：提供一种用于制造体区域网络的通信帧的方法以及使用该身体区域网络的身体区域网络的通信方法，以使得多个体区域终端能够在狭窄的空间中共存而没有通信干扰。 构成：一种用于制造体区网络的通信帧的方法，包括以下步骤：检测存在于预定区域（310）中的终端的数量; 根据检测到的终端的数量，分配单独的帧以使用存在于预定区域中的每个终端; 以及根据检测到的终端（330）的数量，向存在于所述预定区域的所有终端分配传输共存帧，其中所述共存帧包括关于每个终端使用的各个帧的分配信息。
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公开(公告)号：KR1020110027572A
公开(公告)日：2011-03-16
申请号：KR1020100083628
申请日：2010-08-27
Applicant: 한국전자통신연구원
CPC classification number: Y02D70/14 , Y02D70/40 , Y02D70/42 , H04B5/0031 , H04B5/02 , H04W4/80 , H04W92/18
Abstract: PURPOSE: A communication apparatus using a near field is provided to enable a communication apparatus to efficiently perform power supply and to increase data transmission ratio by sharing an interface. CONSTITUTION: A near field signal providing unit(110) supplies one of signals, which applies digital modulation to a base band signal, to a near filed signal. An interface unit(120) transmits and receives the near field signal. A control unit(130) controls the interface unit and the near field signal providing unit.
Abstract translation: 目的：提供一种使用近场的通信装置，使得通信装置能够通过共享接口来有效地执行电力供应和提高数据传输比。 构成：近场信号提供单元（110）将对基带信号进行数字调制的信号之一提供给近场信号。 接口单元（120）发送和接收近场信号。 控制单元（130）控制接口单元和近场信号提供单元。
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公开(公告)号：KR1020100075353A
公开(公告)日：2010-07-02
申请号：KR1020090055585
申请日：2009-06-22
Applicant: 한국전자통신연구원
CPC classification number: H04B13/005 , H04B13/02
Abstract: PURPOSE: A communication system using a portion of a human body is provided to create a stable radio channel using a low frequency band. CONSTITUTION: Transmitting party and receiving party communication devices(10,20) transmits and receives data signals through a wireless transmitting mode. The transmitting party and receiving party couplers transfer data signals between the transmitting party and receiving party communication devices and a human body(30). Transmitting party and receiving party impedance matching devices enables impedance matching between the transmitting party and receiving party communication devices and the transmitting party and receiving party couplers. The transmitting party communication device applies the transmitting data signal of an electrical signal form through the transmitting party coupler to the human body.
Abstract translation: 目的：提供使用人体的一部分的通信系统，以产生使用低频带的稳定的无线信道。 构成：传输方和接收方通信设备（10,20）通过无线传输模式发送和接收数据信号。 发送方和接收方耦合器在发送方和接收方通信设备与人体之间传送数据信号（30）。 发射方和接收方阻抗匹配装置能够实现发射方和接收方通信设备与发射方和接收方耦合器之间的阻抗匹配。 发送方通信装置将通过发送方耦合器的电信号形式的发送数据信号应用于人体。
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公开(公告)号：KR100880448B1
公开(公告)日：2009-01-29
申请号：KR1020070080480
申请日：2007-08-10
Applicant: 한국전자통신연구원
IPC: H03F3/20
CPC classification number: H03G3/3042 , H03F1/0261 , H03F1/0277 , H03F1/32 , H03F3/211 , H03F3/72 , H03F2200/318 , H03F2200/451 , H03F2203/21103 , H03F2203/21139 , H03F2203/7233
Abstract: The low dissipation mixed mode power amplifier is provided to extend the life time of battery by maximizing the efficiency of the maximum usage frequency region. The mixed mode power amplifier(1000) comprises the low output amplifier circuit(1100), the high power amplification circuit(1200), and the amplifier control part(950) and bias circuit(900). The low output amplifier circuit comprises the input impedance conformable part(100), the primary amplification section(200), and the first mid-stage impendence matching line(300) and low output amplifier(700). The high power amplification circuit(1200) comprises the second amplifier(400), and the second mid-stage impendence matching line(500) and high power amplifier(600).
Abstract translation: 提供了低耗散混合模式功率放大器，通过最大化最大使用频率区域的效率来延长电池的使用寿命。 混合模式功率放大器（1000）包括低输出放大器电路（1100），高功率放大电路（1200）和放大器控制部分（950）和偏置电路（900）。 低输出放大器电路包括输入阻抗一致部分（100），初级放大部分（200）和第一中级阻抗匹配线（300）和低输出放大器（700）。 高功率放大电路（1200）包括第二放大器（400）和第二中间阻抗匹配线（500）和高功率放大器（600）。
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公开(公告)号：KR100751064B1
公开(公告)日：2007-08-22
申请号：KR1020060050836
申请日：2006-06-07
Applicant: 한국전자통신연구원
Abstract: 본 발명은 RFID와 같은 무선통신 시스템에서 태그(Tag) 또는 트랜스폰더(Transponder)가 매우 적은 전력으로 효율적으로 입력진폭신호의 정보를 복원하도록 하는 복조회로에 관한 것이다. 본 발명의 복조회로는 전압체배기의 출력을 커패시티브 커플링을 통해 저 전류패스에 연결하여 정보를 복원한다. 본 발명에 의하면, 변조 깊이가 낮은 입력진폭신호에서 정보를 저전력으로 복원하여 통신거리를 증가시킬 수 있다.
RFID, 태그(Tag), 트랜스폰더(Transponder), 해독기(Reader), AM, 복조회로, 전압체배기,-
Patent Agency Ranking
公开(公告)号：KR1020070059862A
公开(公告)日：2007-06-12
申请号：KR1020060050836
申请日：2006-06-07
Applicant: 한국전자통신연구원
CPC classification number: H04B1/40
Abstract: A low-power RFID(Radio Frequency Identification) demodulation circuit for information recovery is provided to increase the communication distance from a reader by connecting the output of a voltage multiplier to a low-current path through capacitive coupling so that a tag in an RFID system can execute information recovery from a signal having a low modulation depth. An RFID demodulation circuit consists of 7 transistors(M1-M7), a capacitor(C), and two current sources(I1,I2). The first electrode of the capacitor(C) is connected to an input port of the demodulation circuit, and the second electrode is connected to the gate of the seventh transistor(M7). The first current source(I1) is connected between the first electrode of the capacitor(C) and the ground. The drain and source of the first transistor(M1) respectively are connected to a source voltage port(Vdd) and one end of the second current source(I2), and the gate is connected with the source through a diode. The second current source(I2) is connected between the source of the first transistor(M1) and the ground. The drain and source of the second transistor(M2) respectively are connected to the source voltage port(Vdd) and the drain of the third transistor(M3). The gate of the second transistor(M2) is connected to gates of the first, fourth, and sixth transistors(M1,M4,M6) in common. The source of the third transistor(M3) are connected to the ground, and the gate is connected to the drain through a diode. The drain of the fourth transistor(M4) is connected to the source voltage port(Vdd), and the source is connected to gates of the fifth and seventh transistors(M5,M7) and the second electrode of the capacitor(C). The source and gate of the fifth transistor(M5) are connected to the ground and gate of the third transistor(M3) respectively. The drain and source of the sixth transistor(M6) are connected to the source voltage port(Vdd) and the drain of the seventh transistor(M7) respectively. The source of the seventh transistor(M7) is connected to the ground.
Abstract translation: 提供用于信息恢复的低功率RFID（射频识别）解调电路，通过电容耦合将电压倍增器的输出连接到低电流路径，从而增加与读取器的通信距离，使RFID系统中的标签 可以从具有低调制深度的信号执行信息恢复。 RFID解调电路由7个晶体管（M1-M7），一个电容器（C）和两个电流源（I1，I2）组成。 电容器（C）的第一电极连接到解调电路的输入端口，第二电极连接到第七晶体管（M7）的栅极。 第一电流源（I1）连接在电容器（C）的第一电极和地之间。 第一晶体管（M1）的漏极和源极分别连接到源极电压端口（Vdd）和第二电流源（I2）的一端，栅极通过二极管与源极连接。 第二电流源（I2）连接在第一晶体管（M1）的源极和地之间。 第二晶体管（M2）的漏极和源极分别连接到源极电压端口（Vdd）和第三晶体管（M3）的漏极。 第二晶体管（M2）的栅极共同连接到第一，第四和第六晶体管（M1，M4，M6）的栅极。 第三晶体管（M3）的源极连接到地，栅极通过二极管连接到漏极。 第四晶体管（M4）的漏极连接到源极电压端口（Vdd），源极连接到第五和第七晶体管（M5，M7）的栅极和电容器（C）的第二电极。 第五晶体管（M5）的源极和栅极分别连接到第三晶体管（M3）的接地和栅极。 第六晶体管（M6）的漏极和源极分别连接到源极电压端口（Vdd）和第七晶体管（M7）的漏极。 第七晶体管（M7）的源极连接到地。
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公开(公告)号：KR1020060041458A
公开(公告)日：2006-05-12
申请号：KR1020040090672
申请日：2004-11-09
Applicant: 한국전자통신연구원
IPC: H03L7/085
CPC classification number: H03L7/0891 , H03D13/004
Abstract: 본 발명은 PLL(Phase locked-loop)이나 DLL(Delay locked-loop)에 사용되는 위상 주파수 검출기에 관한 것으로, 소정 시간 지연된 기준클럭과 리셋신호에 따라 동작되는 제 1 스테이지, 상기 기준클럭과 상기 제 1 스테이지의 출력에 따라 동작되는 제 2 스테이지 및 상기 제 2 스테이지의 출력을 반전시켜 출력하는 인버터로 구성된 업 신호 출력부, 소정 시간 지연된 외부클럭과 상기 리셋신호에 따라 동작되는 제 1 스테이지, 상기 외부클럭과 상기 제 1 스테이지의 출력에 따라 동작되는 제 2 스테이지 및 상기 제 2 스테이지의 출력을 반전시켜 출력하는 인버터로 구성된 다운 신호 출력부, 상기 업 신호 출력부의 제 2 스테이지 출력과 상기 다운 신호 출력부의 제 2 스테이지 출력을 논리 조합하여 상기 리셋신호를 생성하는 논리 게이트를 포함한다. 유효한 제어신호를 얻을 수 있는 입력신호의 위상 범위가 넓으므로 위상고정이 빨라지고, 다이나믹 로직의 적은 전력소모와 빠른 신호전달 특성으로 인해 저전력 및 저잡음 특성을 가진다.
위상 주파수 검출기, 위상고정, 동작 주파수, 지연수단 -
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