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公开(公告)号：FR2895568A1
公开(公告)日：2007-06-29
申请号：FR0513217
申请日：2005-12-23
Applicant: 3D PLUS SA SA
Inventor： VAL CHRISTIAN
IPC: H01L25/065
Abstract: L'invention concerne la fabrication collective de n modules 3D. Elle comprend une étape de fabrication d'un lot de n tranches i sur une même plaque, cette étape étant répétée K fois, puis une étape d'empilement des K plaques, de formation de trous métallisés dans l'épaisseur de l'empilement et destinés à la connexion des tranches entre elles, puis de découpe de l'empilement pour obtenir les n modules 3D.La plaque 10 qui comprend du silicium est recouverte sur une face 11 d'une couche électriquement isolante formant le substrat isolant. Cette face présente des rainures 20 qui délimitent n motifs géométriques, munis d'un composant électronique 1 connecté à des plots de connexion électrique 2' disposés sur ladite face.Après l'empilement, des trous sont percés perpendiculairement aux faces des plaques à l'aplomb des rainures ; la dimension des trous est inférieure à celle des rainures, de manière à ce que le silicium de chaque tranche 10 soit isolé de la paroi du trou par de la résine.C2) métalliser la paroi des trous,D2) découper l'empilement selon les rainures en vue d'obtenir les n modules électroniques
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公开(公告)号：FR2832136A1
公开(公告)日：2003-05-16
申请号：FR0114543
申请日：2001-11-09
Applicant: 3D PLUS SA
Inventor： VAL CHRISTIAN
IPC: G02B6/42 , B81B7/00 , B81B7/02 , H01L23/10 , H01L23/31 , H01L23/34 , H01L31/0203 , H01L31/024 , B65D85/00 , B65B31/00
Abstract: The invention relates to a device that is used for the hermetic encapsulation of a component that must protected against all stresses. The aforementioned component (5) is fixed to a substrate (15) having a temperature control element (17) glued (16) to the other face thereof. Said assembly is disposed in a case comprising two parts (11, 12) which are assembled by means of gluing (13), with a passage for optical links (6) and electrical connections (18, 142). Said component is supported by elements (19) which project out from one part (11) of the case. A unit (14) is glued to the other part (12) of the case, said unit comprising three-dimensional interconnections which form the temperature regulation electronics. The aforementioned unit, case (11, 12) and a minimum length (L) of the links and connections are encased in a mineral protective layer (4'). In particular, the invention can be used for optoelectronic components and MEMS components.
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公开(公告)号：FR2802706B1
公开(公告)日：2002-03-01
申请号：FR9915838
申请日：1999-12-15
Applicant: 3D PLUS SA
Inventor： VAL CHRISTIAN
IPC: H05K3/28 , H01L21/98 , H01L23/522 , H05K1/02 , H05K1/11 , H05K1/18 , H05K3/04 , H05K3/40 , H05K3/46 , H01L23/52 , H01L21/50 , H01L25/00
Abstract: 3D interconnection method of casings or circuits containing electronic components and connecting conductors, where the casings or circuits are stacked in the form of a block (3') by encapsulation by an insulator, involves: (a) the cutting of block by leaving the extremities of conductors (21) indented with respect to corresponding faces (302); (b) the cutting of grooves (40,41) in the faces and perpendicular ones; (c) the metallization of block and the grooves; (d) polishing the faces to remove metallization; (e) encapsulation by resin (303); and (f) metallization of block to ensure shielding (304). The method also includes, in a variant of invention, for supplying power to circuits, a Bus bar, and at step (b) at least one of the grooves cuts into the extremities of two adjacent conductors; the method includes an additional step, that is (g) the cutting of second grooves in the bottom of first grooves in full length, implemented between steps (c) and (e). The width of second grooves is less than that of first grooves. The cutting of grooves is done by sawing, or by use of laser. In another variant of invention, the method comprises an additional step, that is (h) the introduction of a capacitor by bonding plates to lateral faces of groove by a conducting adhesive, which is implemented before step (e). An electronic device with interconnections in three dimensions comprising casings or circuits with connecting conductors and encapsulated to form a block, is made with grooves and metallization according to the method. The metallization is interrupted in full length of second grooves.
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公开(公告)号：FR2802706A1
公开(公告)日：2001-06-22
申请号：FR9915838
申请日：1999-12-15
Applicant: 3D PLUS SA
Inventor： VAL CHRISTIAN
IPC: H05K3/28 , H01L21/98 , H01L23/522 , H05K1/02 , H05K1/11 , H05K1/18 , H05K3/04 , H05K3/40 , H05K3/46 , H01L23/52 , H01L21/50 , H01L25/00
Abstract: 3D interconnection method of casings or circuits containing electronic components and connecting conductors, where the casings or circuits are stacked in the form of a block (3') by encapsulation by an insulator, involves: (a) the cutting of block by leaving the extremities of conductors (21) indented with respect to corresponding faces (302); (b) the cutting of grooves (40,41) in the faces and perpendicular ones; (c) the metallization of block and the grooves; (d) polishing the faces to remove metallization; (e) encapsulation by resin (303); and (f) metallization of block to ensure shielding (304). The method also includes, in a variant of invention, for supplying power to circuits, a Bus bar, and at step (b) at least one of the grooves cuts into the extremities of two adjacent conductors; the method includes an additional step, that is (g) the cutting of second grooves in the bottom of first grooves in full length, implemented between steps (c) and (e). The width of second grooves is less than that of first grooves. The cutting of grooves is done by sawing, or by use of laser. In another variant of invention, the method comprises an additional step, that is (h) the introduction of a capacitor by bonding plates to lateral faces of groove by a conducting adhesive, which is implemented before step (e). An electronic device with interconnections in three dimensions comprising casings or circuits with connecting conductors and encapsulated to form a block, is made with grooves and metallization according to the method. The metallization is interrupted in full length of second grooves.
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Patent Agency Ranking46.发明专利
公开(公告)号：ES2903109T3
公开(公告)日：2022-03-31
申请号：ES19703744
申请日：2019-02-13
Applicant: 3D PLUS
Inventor： VAL CHRISTIAN
IPC: C23C18/16 , C23C18/32 , C23C18/38 , H01L21/288 , H01L21/768 , H05K3/18 , H05K3/42
Abstract: Procedimiento de deposición en fase líquida de capas metálicas en agujeros (11) de un módulo electrónico (10) dispuesto en una cámara hermética (1), a partir de un líquido químico (4) con compuestos metálicos destinados a formar una capa metálica, caracterizado porque los agujeros tienen una profundidad P y un diámetro D tales que D>80 μm y P/D > 10, y porque el procedimiento comprende al menos un ciclo (Cyc) que comprende las siguientes etapas secundarias: - M1) Presurización de la cámara hasta una presión predeterminada P0 y llenar la cámara con el líquido, - M2) Desgasificación de los agujeros mediante la presurización de la cámara a una presión reducida P1, con P1
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公开(公告)号：FR3077825B1
公开(公告)日：2020-02-28
申请号：FR1851215
申请日：2018-02-14
Applicant: 3D PLUS
Inventor： VAL CHRISTIAN
Abstract: L'invention concerne un procédé de dépôt en phase liquide de couches métalliques dans des trous (11) d'un module électronique (10) disposé dans une enceinte hermétique (1), à partir d'un liquide (4) chimique à composés métalliques destinés à former une couche métallique. Les trous ont une profondeur P et un diamètre D tels que D>80 µm et P/D > 10, et le procédé comporte au moins un cycle (Cyc) comportant les sous-étapes suivantes : - M1) Mise sous une pression prédéterminée PO de l'enceinte et remplissage de l'enceinte par le liquide, - M2) Dégazage des trous par mise sous une pression réduite P1 de l'enceinte, avec P1
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公开(公告)号：ES2675783T3
公开(公告)日：2018-07-12
申请号：ES01905860
申请日：2001-01-30
Applicant: 3D PLUS
Inventor： VAL CHRISTIAN
Abstract: Procedimiento de interconexión en tres dimensiones para al menos dos cápsulas (2) plásticas de encapsulado conteniendo cada una al menos un chip electrónico (1), y provista cada una de conductores (30) de conexión para conectar, en el interior de cada cápsula, unos contactos (10) de conexión del chip electrónico con unos pines (40) de salida hacia el exterior de la cápsula, incluyendo dicho procedimiento las etapas siguientes: a) apilado y ensamblado (100) por encolado de las cápsulas; b) recorte (101) a través del plástico que encapsula las cápsulas, a una distancia del chip electrónico comprendida entre aproximadamente 0,5 y 2 mm, para formar un bloque (6) que deja asomar las secciones (31) de los conductores de conexión; c) realización (102) de conexiones eléctricas (71) entre las secciones (31) que asoman sobre las caras de dicho bloque.
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50.发明专利
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