中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

120 records (took 0.028 seconds)

    Photodiode and/or PIN diode structures
    43.
    发明授权
    Photodiode and/or PIN diode structures 有权

    公开(公告)号：US11316064B2

    公开(公告)日：2022-04-26

    申请号：US16887375

    申请日：2020-05-29

    Applicant: GLOBALFOUNDRIES U.S. INC.

    Inventor： Siva P. Adusumilli ,  John J. Ellis-Monaghan ,  Mark D. Levy ,  Vibhor Jain ,  Andre Sturm

    IPC: H01L31/107 ,  H01L31/105 ,  H01L31/036 ,  H01L31/028 ,  H01L31/0312

    Abstract: The present disclosure relates to semiconductor structures and, more particularly, to photodiodes and/or PIN diode structures and methods of manufacture. The structure includes: at least one fin including substrate material, the at least one fin including sidewalls and a top surface; a trench on opposing sides of the at least one fin; a first semiconductor material lining the sidewalls and the top surface of the at least one fin, and a bottom surface of the trench; a photosensitive semiconductor material on the first semiconductor material and at least partially filling the trench; and a third semiconductor material on the photosensitive semiconductor material.

    SEMICONDUCTOR STRUCTURES WITH BODY CONTACT REGIONS EMBEDDED IN POLYCRYSTALLINE SEMICONDUCTOR MATERIAL
    44.
    发明申请
    SEMICONDUCTOR STRUCTURES WITH BODY CONTACT REGIONS EMBEDDED IN POLYCRYSTALLINE SEMICONDUCTOR MATERIAL 有权

    公开(公告)号：US20220093744A1

    公开(公告)日：2022-03-24

    申请号：US17029667

    申请日：2020-09-23

    Applicant: GLOBALFOUNDRIES U.S. Inc.

    Inventor： Steven M. Shank ,  Siva P. Adusumilli ,  Yves Ngu ,  Michael Zierak

    IPC: H01L29/10 ,  H01L21/763 ,  H01L29/04 ,  H01L27/12

    Abstract: Body-contacted semiconductor structures and methods of forming a body-contacted semiconductor structure. A semiconductor substrate, which contains of a single-crystal semiconductor material, includes a device region and a plurality of body contact regions each comprised of the single-crystal semiconductor material. A polycrystalline layer and polycrystalline regions are formed in the semiconductor substrate. The polycrystalline regions are positioned between the polycrystalline layer and the device region, and the polycrystalline regions have a laterally-spaced arrangement with a gap between each adjacent pair of the polycrystalline regions. One of the plurality of body contact regions is arranged in the gap between each adjacent pair of the polycrystalline regions.

    MULTI-DEPTH REGIONS OF HIGH RESISTIVITY IN A SEMICONDUCTOR SUBSTRATE
    48.
    发明申请
    MULTI-DEPTH REGIONS OF HIGH RESISTIVITY IN A SEMICONDUCTOR SUBSTRATE 有权

    公开(公告)号：US20210111063A1

    公开(公告)日：2021-04-15

    申请号：US16598064

    申请日：2019-10-10

    Applicant: GLOBALFOUNDRIES U.S. Inc.

    Inventor： Steven M. Shank ,  Anthony K. Stamper ,  Siva P. Adusumilli ,  Ian McCallum-Cook ,  Michel J. Abou-Khalil

    IPC: H01L21/763 ,  H01L29/06 ,  H01L23/66 ,  H01L21/265 ,  H01L21/324

    Abstract: Semiconductor structures including electrical isolation and methods of forming a semiconductor structure including electrical isolation. Shallow trench isolation regions extend from a top surface of a semiconductor substrate into the semiconductor substrate. The semiconductor substrate contains single-crystal semiconductor material, and the shallow trench isolation regions are positioned to surround an active device region of the semiconductor substrate. A polycrystalline layer is formed in the semiconductor substrate. The polycrystalline layer has a first section beneath the active device region and a second section beneath the plurality of shallow trench isolation regions. The first section of the polycrystalline layer is located at a different depth relative to the top surface of the semiconductor substrate than the second section of the polycrystalline layer.

    Semiconductor structure with semiconductor-on-insulator region and method
    49.
    发明授权
    Semiconductor structure with semiconductor-on-insulator region and method 有权

    公开(公告)号：US12131904B2

    公开(公告)日：2024-10-29

    申请号：US17934220

    申请日：2022-09-22

    Applicant: GlobalFoundries U.S. Inc.

    Inventor： Ramsey Hazbun ,  Alvin J. Joseph ,  Siva P. Adusumilli ,  Cameron Luce

    IPC: H01L21/02

    CPC classification number: H01L21/02433 ,  H01L21/02381 ,  H01L21/02639 ,  H01L21/02647

    Abstract: Disclosed are semiconductor structure embodiments of a semiconductor-on-insulator region on a bulk substrate. The semiconductor-on-insulator region includes an upper semiconductor layer above and physically separated from the substrate by insulator-containing cavities (e.g., by dielectric layer and/or a pocket of trapped air, of trapped gas, or under vacuum) and, optionally, by a lower semiconductor layer. Disclosed method embodiments include forming openings that extend vertically through the upper semiconductor layer, through a sacrificial semiconductor layer and, optionally, through a lower semiconductor layer to the substrate. Then, a selective isotropic etch process is performed to form cavities, which extend laterally off the sides of the openings into the sacrificial semiconductor layer. Depending upon the embodiments, different process steps are further performed to form plugs in at least the upper portions of the openings and insulators (including dielectric layers and/or a pocket of trapped air, of trapped gas or under vacuum) in the cavities.

Patent Agency Ranking