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    TIME-SPACE-TIME SWITCHING NETWORK USING A CLOSED-LOOP LINK
    44.
    发明专利
    TIME-SPACE-TIME SWITCHING NETWORK USING A CLOSED-LOOP LINK 未知

    公开(公告)号：CA1210841A

    公开(公告)日：1986-09-02

    申请号：CA440704

    申请日：1983-11-08

    Applicant: IBM

    Inventor： BOISSEAU MARC ,  BORIE JEAN C ,  CROISIER ALAIN ,  DEMANGE MICHEL ,  LEBIZAY GERALD ,  ROSSI JEAN-PIERRE P

    IPC: H04Q11/04 ,  H04Q11/06

    Abstract: A TIME-SPACE-TIME SWITCHING NETWORK USING A CLOSED-LOOP LINK A switching network for selectively connecting at least one input time-division channel on an input link (IL) to at least one output time-division channel on an output link (OL). The network is organized around a closed-loop link on which circulates a multiplex message carrying 512 time-division exchange channels. The input and output links are respectively multiplexed onto an input multiplex link (IML) and an output multiplex link (OML) which are coupled to the closed loop by a switching module (SM). Each switching module comprises an input buffer (IB), an output buffer (OB) and a local buffer (LB) the addressing of which is selectively controlled by a time slot counter (CTR) or a corresponding pointer memory. So-called "broadcast" connections coupling one input channel to several output channels, and "in-cast" connections coupling several input channels to one output channel, can be established. Each of these connections uses only one exchange channel.

    DEVICE FOR REPRODUCING THE CHARGE STORED IN AN INPUT CAPACITOR IN A PLURALITY OF OUTPUT CAPACITORS
    46.
    发明专利
    DEVICE FOR REPRODUCING THE CHARGE STORED IN AN INPUT CAPACITOR IN A PLURALITY OF OUTPUT CAPACITORS 未知

    公开(公告)号：CA1091349A

    公开(公告)日：1980-12-09

    申请号：CA264632

    申请日：1976-10-29

    Applicant: IBM

    Inventor： CROISIER ALAIN ,  GLAISE RENE

    IPC: G11C27/04 ,  G11C19/18 ,  H01L21/33 ,  H01L21/339 ,  H01L29/70 ,  H01L29/762 ,  H03H11/26 ,  H03K17/02 ,  H03K17/56

    Abstract: DEVICE FOR REPRODUCING THE CHARGE STORED IN AN INPUT CAPACITOR IN A PLURALITY OF OUTPUT CAPACITORS Arrangement allowing an input bucket brigade (BBD) stage to feed several other BBD stages in parallel with no loss of the signal transferred from the input stage to the subsequent ones. An input voltage corresponding to a charge quantity is stored in the second capacitor of the input BBD stage. The drain of the output transistor of the input stage is connected to a first BBD stage wherein the first capacitor is connected to the source electrode of the first transistor of a second BBD stage. The first transistors of both stages are controlled by the same clock pulses. When these transistors are turned on, the capacitors connected thereto are in series with the second capacitor of the input stage. Consequently, the same current will flow through these capacitors, which will thus store the same charges so that the charge representing the input voltage will be reproduced in the first capacitors of the two BBD stages connected to the input stage. Means are provided for grounding the terminal of the first capacitor in the first stage that is connected to the source of the first transistor in the second stage at the time the transfer of the duplicated charge takes place.

    47.
    发明专利
    未知

    公开(公告)号：FR2371840A1

    公开(公告)日：1978-06-16

    申请号：FR7630658

    申请日：1976-10-04

    Applicant: IBM FRANCE

    Inventor： CROISIER ALAIN ,  JACQUAR CHRISTIAN

    IPC: H04M19/00 ,  H04Q1/30 ,  H04M1/76

    Abstract: A circuit for interfacing an AF line to a central unit makes use of an RF transformer Tr. Said transformer is so arranged that the source AF signal to be transmitted modulates an RF carrier generated in a primary winding of the transformer and the resulting modulated signal in the secondary winding is demodulated before being transmitted to a line which is thereby linked to the source.

    49.
    发明专利
    未知

    公开(公告)号：DE2646830A1

    公开(公告)日：1977-05-05

    申请号：DE2646830

    申请日：1976-10-16

    Applicant: IBM

    Inventor： CROISIER ALAIN ,  GLAISE RENE

    IPC: G11C27/04 ,  G11C19/18 ,  H01L21/33 ,  H01L21/339 ,  H01L29/70 ,  H01L29/762 ,  H03H11/26

    Abstract: Arrangement allowing an input bucket brigade (BBD) stage to feed several other BBD stages in parallel with no loss of the signal transferred from the input stage to the subsequent ones. An input voltage corresponding to a charge quantity is stored in the second capacitor of the input BBD stage. The drain of the output transistor of the input stage is connected to a first BBD stage wherein the first capacitor is connected to the source electrode of the first transistor of a second BBD stage. The first transistors of both stages are controlled by the same clock pulses. When these transistors are turned on, the capacitors connected thereto are in series with the second capacitor of the input stage. Consequently, the same current will flow through these capacitors, which will thus store the same charges so that the charge representing the input voltage will be reproduced in the first capacitors of the two BBD stages connected to the input stage. Means are provided for grounding the terminal of the first capacitor in the first stage that is connected to the source of the first transistor in the second stage at the time the transfer of the duplicated charge takes place.

    50.
    发明专利
    未知

    公开(公告)号：FR2296322A1

    公开(公告)日：1976-07-23

    申请号：FR7443560

    申请日：1974-12-27

    Applicant: IBM FRANCE

    Inventor： CROISIER ALAIN ,  DESBLACHE ANDRE

    IPC: H04L27/38 ,  H04L27/00

    Abstract: A data transmitting and receiving system in which data is transmitted by varying the phase and amplitude of a carrier, including a receiver which detects the data in a received signal while reducing the effects of noise components which alter the phase and amplitude of the received signal. An in-phase component and a quadrature component are derived from the received signal and are then rotated an angular amount which is a function of an estimated value of the phase error in the received signal. The rotated components are then compared with two sets of reference coordinates for selecting a pair of reference coordinates which have values closest to the values of the rotated in-phase and quadrature components, respectively. The estimated value of the phase error is derived as a trigonometric function of the rotated components and selected reference coordinates. The selected reference coordinates are indicative of the transmitted data.

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