公开(公告)号：HK1015048A1

公开(公告)日：1999-10-08

申请号：HK99100005

申请日：1999-01-04

Applicant: IBM

Inventor： ARIMILLI L BABA ,  KAISER JOHN MICHAEL ,  KIM KYONGMEE ,  MAULE WARREN EDWARD

IPC: G06F13/36 ,  G06F12/08 ,  G06F12/0879 ,  G06F

公开(公告)号：CA2286364A1

公开(公告)日：1998-10-22

申请号：CA2286364

申请日：1998-04-03

Applicant: IBM

Inventor： DODSON JOHN STEVEN ,  KAISER JOHN MICHAEL ,  LEWIS JERRY DON ,  ARIMILLI RAVI KUMAR

IPC: G06F12/08 ,  G06F12/0831

Abstract: A method of improving memory latency associated with a read-type operation in a multiprocessor computer system is disclosed. After a value (data or instruction) is loaded from system memory into at least two caches, the caches are marked as containing shared, unmodified copies of the value and, when a requesting processing unit issues a message indicating that it desires to read the value, a given one of the caches transmits a response indicating that the given cache can source the value. The response is transmitted in response to the cache snooping the message from an interconnect which is connected to the requesting processing unit. The response is detected by system logic and forwarded from the system logic to the requesting processing unit. The cache then sources the value to an interconnect which is connected to the requesting processing unit. The system memory detects the message and would normally source the value, but the response informs the memory device that the value is to be sourced by the cache instead. Since the cache latency can be much less than the memory latency, the read performance can be substantially improved with this new protocol.

公开(公告)号：RU2111532C1

公开(公告)日：1998-05-20

申请号：SU5010326

申请日：1991-12-17

Applicant: IBM

Inventor： KAISER JOHN MICHAEL ,  YOUNGBLOOD LOYAL DAVID

IPC: G06F13/00 ,  G06F15/163 ,  G06F13/14 ,  G06F15/173 ,  H04L12/00

Abstract: FIELD: computer engineering, in particular, data transmission between data processing systems. SUBSTANCE: device has N ports, matrix commutator and bus arbiter. Ports are connected to each other by means of buses. In addition ports are connected to matrix commutator. EFFECT: increased functional capabilities. 10 cl, 10 dwg

公开(公告)号：RU2110839C1

公开(公告)日：1998-05-10

申请号：SU5010325

申请日：1991-12-17

Applicant: IBM

Inventor： KAISER JOHN MICHAEL ,  ST CLAIR JOE CHRISTOPHER

IPC: G06F15/163 ,  G06F13/14 ,  G06F13/38 ,  H04Q3/52

Abstract: FIELD: computer engineering. SUBSTANCE: device has first port which is connected to at least one computer device, while second port is connected to second device. Two ports are connected to each other by means of commutator, which has unit for transmission control between devices and for detection of moment of alternation in communication line. EFFECT: increased functional capabilities. 5 cl, 9 dwgt

公开(公告)号：CZ281144B6

公开(公告)日：1996-06-12

申请号：CS385291

申请日：1991-12-17

Applicant: IBM

Inventor： KAISER JOHN MICHAEL ,  YOUNGBLOOD LOYAL DAVID

IPC: G06F15/163 ,  G06F13/00 ,  G06F13/14 ,  G06F15/173 ,  H04L12/00

Abstract: A communications network including several ports 30, 32, 34, 36, 42, 44, 46 and 48 where each port is connected to at least one data processing system element. The ports are interconnected by an information bus 52. Additionally, the ports are connected to a matrix switch 40 that has the capability of providing a direct communications channel between any two of the ports. Each port includes control circuitry for communicating with other ports over the bus 52 and, through the bus, regulating the matrix switch in order for the matrix switch 40 to provide the direct communication channels between two ports.

公开(公告)号：CZ280707B6

公开(公告)日：1996-04-17

申请号：CS385391

申请日：1991-12-17

Applicant: IBM

Inventor： KAISER JOHN MICHAEL ,  ST CLAIR JOE CHRISTOPHER

IPC: G06F15/163 ,  G06F13/14 ,  G06F13/38 ,  H04Q3/52

Abstract: A communication system for providing a communication path between two of a plurality of devices. A first port 30 is connected to one device and a second port 32 is connected to a second device. A switch 40 connects the two ports for communications connection between the ports in response to commands from the devices to each other. The switch includes the capability of monitoring communications between the devices and determining when a change is to be made in the communications path and then making the change accordingly.

公开(公告)号：HUT59778A

公开(公告)日：1992-06-29

申请号：HU398591

申请日：1991-12-17

Applicant: IBM

Inventor： KAISER JOHN MICHAEL ,  YOUNGBLOOD LOYAL DAVID

IPC: G06F13/00 ,  G06F15/163 ,  G06F13/14 ,  G06F15/173 ,  H04L12/00

Abstract: A communications network including several ports 30, 32, 34, 36, 42, 44, 46 and 48 where each port is connected to at least one data processing system element. The ports are interconnected by an information bus 52. Additionally, the ports are connected to a matrix switch 40 that has the capability of providing a direct communications channel between any two of the ports. Each port includes control circuitry for communicating with other ports over the bus 52 and, through the bus, regulating the matrix switch in order for the matrix switch 40 to provide the direct communication channels between two ports.

公开(公告)号：HU913985D0

公开(公告)日：1992-03-30

申请号：HU398591

申请日：1991-12-17

Applicant: IBM

Inventor： KAISER JOHN MICHAEL ,  YOUNGBLOOD LOYAL DAVID

IPC: G06F15/163 ,  G06F13/00 ,  G06F13/14 ,  G06F15/173 ,  H04L12/00

Abstract: A communications network including several ports 30, 32, 34, 36, 42, 44, 46 and 48 where each port is connected to at least one data processing system element. The ports are interconnected by an information bus 52. Additionally, the ports are connected to a matrix switch 40 that has the capability of providing a direct communications channel between any two of the ports. Each port includes control circuitry for communicating with other ports over the bus 52 and, through the bus, regulating the matrix switch in order for the matrix switch 40 to provide the direct communication channels between two ports.