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公开(公告)号:GB2251162B
公开(公告)日:1995-06-21
申请号:GB9124020
申请日:1991-11-12
Applicant: MOTOROLA INC
Inventor: MUELLER BRUCE D , KAZECKI HENRY L , GOODE STEVEN H , BAKER JAMES C
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公开(公告)号:CA2103392A1
公开(公告)日:1994-06-04
申请号:CA2103392
申请日:1993-11-18
Applicant: MOTOROLA INC
Inventor: KAZECKI HENRY L , GOODE STEVEN H , DENNIS DONALD W , BAKER JAMES C , BAUM KEVIN L , MUELLER BRUCE D
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公开(公告)号:GB2239375B
公开(公告)日:1994-05-04
申请号:GB9025985
申请日:1990-11-29
Applicant: MOTOROLA INC
Inventor: BAKER JAMES C , LEVINE STEPHEN N , PUHL LARRY C , CARNEY SCOTT N
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公开(公告)号:MX174068B
公开(公告)日:1994-04-19
申请号:MX2338590
申请日:1990-11-19
Applicant: MOTOROLA INC
Inventor: CARNEY SCOTT N , BAKER JAMES C , LEVINE STEPHEN N , PUHL LARRY C
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公开(公告)号:MX173763B
公开(公告)日:1994-03-25
申请号:MX9102603
申请日:1991-12-17
Applicant: MOTOROLA INC
Inventor: BAKER JAMES C , KAZECKI HENRY L , GOODE STEVEN H
IPC: H04L27/00 , H04L27/227 , H04L27/22
Abstract: The pi /4-QPSK coherent detector of the present invention has a vector input and an output comprising recovered data in bit pair form. The pi /4-QPSK coherent detector recovers bursts of data, in a TDMA system, that has been encoded in an amplitude modulated vector's phase angle. The pi /4-QPSK coherent detector detects the pi /4-QPSK constellation of the incoming modulated signal and outputs the recovered data stream.
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46.
公开(公告)号:GB2265800A
公开(公告)日:1993-10-06
申请号:GB9310866
申请日:1992-08-19
Applicant: MOTOROLA INC
Inventor: KAZECKI HENRY L , BAKER JAMES C
Abstract: The present invention presents an apparatus and method for recovering symbols in a data packet (101) transmitted to a receiver from a remote signal source (204) in a time-varying channel using multiple sampling points. In a digital cellular radiotelephone TDMA system, the receiver (202) performs a complex correlation on the desired slot sync word (DSSW) and the coded digital verification color code (CDVCC) in the data packet (101) and on the adjacent slot sync word (ASSW) in an adjacent data packet (102) to produce a first, second and third optimum sampling point, respectively. The data packet (101) is divided into four regions (A, B, C and D). The symbols in each region (A, B, C and D) are serially recovered using one or more of the multiple sampling points depending on the quality of the sampling point adjacent to each region (A, B, C and D).
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47.
公开(公告)号:GB2256995A
公开(公告)日:1992-12-23
申请号:GB9217656
申请日:1991-12-20
Applicant: MOTOROLA INC
Inventor: KAZECKI HENRY L , BAKER JAMES C
Abstract: Apparatus and method for recovering a time varying TDM signal packet (Rx) having a long duration. The packet (Rx) is recovered in a forward or reverse direction depending upon the intensity of the signal over the recovered portion of the packet (Rx). Known sync words (601) and codes (607) within the signal packet (Rx) provide starting points from which information in the packet (Rx) is recovered.
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公开(公告)号:CA2073182A1
公开(公告)日:1992-06-22
申请号:CA2073182
申请日:1991-12-20
Applicant: MOTOROLA INC
Inventor: KAZECKI HENRY L , BAKER JAMES C
Abstract: A differential quadrature PSK receiver (100) recovers serial data in a forward and reverse direction in time using a forward and reverse mode PLL (232) and decoder switch (108). The DQPSK receiver (100) is particularly useful for recovering a packet of serial data (Rx) having a time-varying signal level and a relatively long duration. Sync words in the packet (Rx) or adjacent packets (Ry) provide starting points from which the data is recovered. The direction in time of data recovery is dependent on the quality of the time-varying signal level in the packet (Rx).
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公开(公告)号:GB2365291B
公开(公告)日:2002-11-20
申请号:GB0103078
申请日:2001-02-07
Applicant: MOTOROLA INC
Inventor: CLASSON BRIAN KEITH , SCHAFFNER TERRY M , DESAI VIPUL A , BAKER JAMES C , FRIEND DANIEL M
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公开(公告)号:BR9900169A
公开(公告)日:2000-01-11
申请号:BR9900169
申请日:1999-01-26
Applicant: MOTOROLA INC
Inventor: BAKER JAMES C , OLIVER JOHN P , KIRKIRIS NECTAR
Abstract: According to the present disclosure, aperiodic data is applied to parallel register (500). When a predetermined relationship between an aperiodic load signal and a periodic oversample clock signal occurs, the aperiodic data is latched to the output (506) of the parallel register as substantially periodic data. The substantially periodic data is loaded into a sigma-delta DAC (502) for processing. The sigma-delta DAC (502) is driven by a periodic oversample clock to produce a 1-bit oversampled, time averaged representation of the substantially periodic data.
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