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    METHOD AND APPARATUS FOR SOFT HANDOFF COMMUNICATIONS IN A COMMUNICATION SYSTEM OPERATING ACCORDING TO MULTIPLE COMMUNICATION STANDARDS
    41.
    发明专利
    METHOD AND APPARATUS FOR SOFT HANDOFF COMMUNICATIONS IN A COMMUNICATION SYSTEM OPERATING ACCORDING TO MULTIPLE COMMUNICATION STANDARDS 未知

    公开(公告)号：CA2372564C

    公开(公告)日：2005-01-04

    申请号：CA2372564

    申请日：2001-03-30

    Applicant: MOTOROLA INC

    Inventor： JALLOUL LOUAY ,  TENBROOK KEITH A ,  ROTSTEIN RON ,  CHEN JIANGNAN ,  LUZ YUDA YEHUDA

    IPC: H04W36/14 ,  H04W36/18 ,  H04Q7/38 ,  H04B7/00

    Abstract: A soft handoff operation is provided for a first signal transmitted accordin g to a first communication standard (IS-95B) and a second signal transmitted according to a second communication standard (IS-95C). A mobile station (MS) (204) receives the first signal, detects a pilot signal, measures pilot sign al strength, and transmits a pilot strength measurement message. When the MS fails to receive a handoff direction message after transmitting the pilot strength message, the MS searches for a detecting presence of a broadcast control channel (BCCH) associated with a type IS-95C cell site (202) and measures a carrier-to-interference ratio of the BCCH. The MS compares the carrier-to-interference ratio to a threshold, and when the ratio is above th e threshold, initiates a second communication according to the IS-95C standard , thus initiating a soft handoff operation and allowing cell sites (202, 203) to transmit information according to the IS-95C and IS-95B standards, respectively.

    42.
    发明专利
    未知

    公开(公告)号：FR2754654B1

    公开(公告)日：2004-09-10

    申请号：FR9711928

    申请日：1997-09-25

    Applicant: MOTOROLA INC

    Inventor： SCHIEMENZ ARTHUR FRED ,  LUZ YUDA YEHUDA ,  ANDERSON DALE ROBERT ,  JALLOUL LOUAY ADEL

    IPC: H03F3/60 ,  H03F3/68 ,  H04B1/04

    Abstract: In a hybrid matrix amplifier array (100), a configurable digital transform matrix (116) is initialize with a matrix of transform coefficients. A plurality of digital input signals (M1-M4) are received at inputs of the configurable digital transform matrix (116). The plurality of digital input signals are transformed to produce a plurality of transform digital signals (A1-A4) using the matrix of transform coefficients. The plurality of transform digital signals are converted to a plurality of transformed analoged signals (206) to produce a plurality of transformed analog signals. The transformed analog signals are amplified (104, 208) to produce amplified transformed signals. Finally, the amplified transformed signals are inverse transformed (102, 210) to produce output signals that correspond to a respective digital input signal (M1-M4). Upon sensing a failure in an amplifier array (104,126) a controller (128) recalls matrix transform coefficients from a memory (130) and write and reconfigures the digital transform matrix (116) to minimize the effects of the amplifier failure at the hybrid matrix amplifier outputs (132).

    44.
    发明专利
    未知

    公开(公告)号：SE519826C2

    公开(公告)日：2003-04-15

    申请号：SE9604433

    申请日：1996-12-02

    Applicant: MOTOROLA INC

    Inventor： ROTTINGHAUS ALAN PATRICK ,  LUREY DANIEL MORRIS ,  LUZ YUDA YEHUDA

    IPC: H03C1/00 ,  H03C3/00 ,  H04B1/26 ,  H04B7/08 ,  H04L1/06 ,  H04L1/22 ,  H04L27/20 ,  H04Q7/30 ,  H04Q7/38 ,  H04B1/16

    Abstract: A multiple access digital up converter/modulator includes selectors (1606, 1608) having inputs (1602, 1604) and outputs coupled to first and second interpolating filters (1610, 1626). The output of the first interpolating filter is selectively coupled to a first mixer (1612) and a first adder (1622), the first adder also receiving a first phase value, and the output is coupled to a first phase accumulator (1616) the output of which is coupled to a first sinusoid generator (1614) and selectively coupled to a second sinusoid generator (1630). The outputs of each of the first and second mixers are selectively coupled to an output adder (1634) and to inputs of the first and second mixers. The output of the second interpolating filter (1626) is selectively coupled to a second mixer (1628) and a second adder (1638), which also receives a second phase value and the output of which is coupled to a second phase accumulator (1640) the output of which is selectively coupled to the second sinusoid generator.

    Method and apparatus for soft handoff communications in a communication system operating according to multiple communication standards
    46.
    发明专利
    Method and apparatus for soft handoff communications in a communication system operating according to multiple communication standards 未知

    公开(公告)号：AU5301301A

    公开(公告)日：2001-10-23

    申请号：AU5301301

    申请日：2001-03-30

    Applicant: MOTOROLA INC

    Inventor： JALLOUL LOUAY ,  TENBROOK KEITH A ,  CHEN JIANGNAN ,  ROTSTEIN RON ,  LUZ YUDA YEHUDA

    IPC: H04W36/14 ,  H04W36/18

    Abstract: A soft handoff operation is provided for a first signal transmitted according to a first communication standard (IS-95B) and a second signal transmitted according to a second communication standard (IS-95C). A mobile station (MS) (204) receives the first signal, detects a pilot signal, measures pilot signal strength, and transmits a pilot strength measurement message. When the MS fails to receive a handoff direction message after transmitting the pilot strength message, the MS searches for a detecting presence of a broadcast control channel (BCCH) associated with a type IS-95C cell site (202) and measures a carrier-to-interference ratio of the BCCH. The MS compares the carrier-to-interference ratio to a threshold, and when the ratio is above the threshold, initiates a second communication according to the IS-95C standard, thus initiating a soft handoff operation and allowing cell sites (202, 203) to transmit information according to the IS-95C and IS-95B standards, respectively.

    47.
    发明专利
    未知

    公开(公告)号：DE19680328T1

    公开(公告)日：1997-07-31

    申请号：DE19680328

    申请日：1996-02-29

    Applicant: MOTOROLA INC

    Inventor： ROTTINGHAUS ALAN PATRICK ,  LUREY DANIEL MORRIS ,  LUZ YUDA YEHUDA

    IPC: H03C1/00 ,  H03C3/00 ,  H04B1/26 ,  H04B7/08 ,  H04L1/06 ,  H04L1/22 ,  H04L27/20 ,  H04Q7/30 ,  H04Q7/38 ,  H04L27/34

    Abstract: A multiple access digital up converter/modulator includes selectors (1606, 1608) having inputs (1602, 1604) and outputs coupled to first and second interpolating filters (1610, 1626). The output of the first interpolating filter is selectively coupled to a first mixer (1612) and a first adder (1622), the first adder also receiving a first phase value, and the output is coupled to a first phase accumulator (1616) the output of which is coupled to a first sinusoid generator (1614) and selectively coupled to a second sinusoid generator (1630). The outputs of each of the first and second mixers are selectively coupled to an output adder (1634) and to inputs of the first and second mixers. The output of the second interpolating filter (1626) is selectively coupled to a second mixer (1628) and a second adder (1638), which also receives a second phase value and the output of which is coupled to a second phase accumulator (1640) the output of which is selectively coupled to the second sinusoid generator.

    FREQUENCY INCREASING CONVERTER/MODULATOR OF INCREASED ACCESSIBILITY AND METHOD
    50.
    发明专利
    FREQUENCY INCREASING CONVERTER/MODULATOR OF INCREASED ACCESSIBILITY AND METHOD 未知

    公开(公告)号：PL317897A1

    公开(公告)日：1997-04-28

    申请号：PL31789796

    申请日：1996-02-29

    Applicant: MOTOROLA INC

    Inventor： ROTTINGHAUS ALAN PATRICK ,  LUREY DANIEL MORRIS ,  LUZ YUDA YEHUDA

    IPC: H03C1/00 ,  H03C3/00 ,  H04B1/26 ,  H04B7/08 ,  H04L1/06 ,  H04L1/22 ,  H04L27/20 ,  H04Q7/30 ,  H04Q7/38

    Abstract: A multiple access digital up converter/modulator includes selectors (1606, 1608) having inputs (1602, 1604) and outputs coupled to first and second interpolating filters (1610, 1626). The output of the first interpolating filter is selectively coupled to a first mixer (1612) and a first adder (1622), the first adder also receiving a first phase value, and the output is coupled to a first phase accumulator (1616) the output of which is coupled to a first sinusoid generator (1614) and selectively coupled to a second sinusoid generator (1630). The outputs of each of the first and second mixers are selectively coupled to an output adder (1634) and to inputs of the first and second mixers. The output of the second interpolating filter (1626) is selectively coupled to a second mixer (1628) and a second adder (1638), which also receives a second phase value and the output of which is coupled to a second phase accumulator (1640) the output of which is selectively coupled to the second sinusoid generator.

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