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公开(公告)号:AU2023202734B2
公开(公告)日:2025-02-13
申请号:AU2023202734
申请日:2023-05-02
Applicant: PANASONIC IP CORP AMERICA
Inventor: ABE KIYOFUMI , NISHI TAKAHIRO , TOMA TADAMASA , KANOH RYUICHI , LIM CHONG SOON , LIAO RU LING , SUN HAI WEI , SHASHIDHAR SUGHOSH PAVAN , TEO HAN BOON , LI JING YA
IPC: H04N19/117 , H04N19/157 , H04N19/80
Abstract: An image encoder is provided, which includes circuitry and a memory coupled to the circuitry. The circuitry, in operation, performs a boundary smoothing operation along a boundary between a first partition having a non-rectangular shape (e.g., a triangular shape) and a second partition that are split from an image block. The boundary smoothing operation includes: first-predicting first values of a set of pixels of the first partition along the boundary, using information of the first partition; second-predicting second values of the set of pixels of the first partition along the boundary, using information of the second partition; weighting the first values and the second values; and encoding the first partition using the weighted first values and the weighted second values.
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公开(公告)号:MX2024004992A
公开(公告)日:2024-05-07
申请号:MX2024004992
申请日:2020-02-18
Applicant: PANASONIC IP CORP AMERICA
Inventor: LIM CHONG SOON , SUN HAI WEI , TOMA TADAMASA , NISHI TAKAHIRO , ABE KIYOFUMI , KANOH RYUICHI , SHASHIDHAR SUGHOSH PAVAN , TEO HAN BOON , LIAO RU LING , LI JING YA
IPC: H04N19/537 , H04N19/105 , H04N19/157 , H04N19/96
Abstract: Se proporciona un codificador de imagen el cual incluye conjunto de circuitos y una memoria acoplada al conjunto de circuitos. En operación, el conjunto de circuitos realiza: división de un bloque de imagen en una pluralidad de divisiones que incluyen una primera división que tiene una forma no rectangular (por ejemplo, una forma triangular) y una segunda división; predecir un primer vector de movimiento para la primera división y un segundo vector de movimiento para la segunda división; y codificar la primera división usando el primer vector de movimiento y la segunda división usando el segundo vector de movimiento.
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公开(公告)号:MX2024004987A
公开(公告)日:2024-05-07
申请号:MX2024004987
申请日:2020-02-18
Applicant: PANASONIC IP CORP AMERICA
Inventor: LIM CHONG SOON , SUN HAI WEI , TOMA TADAMASA , NISHI TAKAHIRO , ABE KIYOFUMI , KANOH RYUICHI , SHASHIDHAR SUGHOSH PAVAN , TEO HAN BOON , LIAO RU LING , LI JING YA
IPC: H04N19/537 , H04N19/105 , H04N19/157 , H04N19/96
Abstract: Se proporciona un codificador de imagen el cual incluye conjunto de circuitos y una memoria acoplada al conjunto de circuitos. En operación, el conjunto de circuitos realiza: división de un bloque de imagen en una pluralidad de divisiones que incluyen una primera división que tiene una forma no rectangular (por ejemplo, una forma triangular) y una segunda división; predecir un primer vector de movimiento para la primera división y un segundo vector de movimiento para la segunda división; y codificar la primera división usando el primer vector de movimiento y la segunda división usando el segundo vector de movimiento.
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公开(公告)号:MX2020013276A
公开(公告)日:2021-02-22
申请号:MX2020013276
申请日:2020-01-08
Applicant: PANASONIC IP CORP AMERICA
Inventor: TOMA TADAMASA , NISHI TAKAHIRO , OHKAWA MASATO , SAITOU HIDEO , ABE KIYOFUMI , KANOH RYUICHI
IPC: H04N19/12 , H04N19/124 , H04N19/157 , H04N19/176 , H04N19/18 , H04N19/625
Abstract: Se proporciona un codificador (100) que codifica un bloque actual en una imagen que incluye circuitaje y memoria. Usando la memoria, el circuitaje: realiza una primera transformada sobre una señal residual del bloque actual usando una base de primera transformada para generar coeficientes de primera transformada; y realiza una segunda transformada sobre los coeficientes de primera transformada usando una base de segunda transformada para generar coeficientes de segunda transformada y cuantificar los coeficientes de segunda transformada, cuando la base de primera transformada es la misma que una base de transformada predeterminada; y cuantifica los coeficientes de primera transformada sin realizar la segunda transformada cuando la base de primera transformada es diferente de la base de transformada predeterminada.
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公开(公告)号:SG11202011403WA
公开(公告)日:2020-12-30
申请号:SG11202011403W
申请日:2019-05-09
Applicant: PANASONIC IP CORP AMERICA
Inventor: TOMA TADAMASA , NISHI TAKAHIRO , ABE KIYOFUMI , KANOH RYUICHI , LIM CHONG SOON , SHASHIDHAR SUGHOSH PAVAN , LIAO RU LING , SUN HAI WEI , TEO HAN BOON , LI JING YA
IPC: H04N19/119 , H04N19/176 , H04N19/70
Abstract: An encoder (100) partitions into blocks using a set of block partition modes obtained by combining one or more block partition modes defining a partition type. The set of block partition modes includes a first partition mode defining the partition direction and number of partitions for partitioning a first block, and a second block partition mode defining the partition direction and number of partitions for partitioning a second block which is one of blocks obtained after the first block is partitioned. When the number of partitions of the first block partition mode is three, the second block is a center block among the blocks obtained after partitioning the first block, and the partition direction of the second block partition mode is same as the partition direction of the first block partition mode, the second block partition mode includes only a block partition mode indicating that the number of partitions is three.
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公开(公告)号:AU2018320382A1
公开(公告)日:2020-02-27
申请号:AU2018320382
申请日:2018-08-10
Applicant: PANASONIC IP CORP AMERICA
Inventor: ABE KIYOFUMI , NISHI TAKAHIRO , TOMA TADAMASA , KANOH RYUICHI , LIM CHONG SOON , LIAO RU LING , SUN HAI WEI , SHASHIDHAR SUGHOSH PAVAN , TEO HAN BOON , LI JING YA
IPC: H04N19/117 , H04N19/157 , H04N19/80
Abstract: An image encoder is provided, which includes circuitry and a memory coupled to the circuitry. The circuitry, in operation, performs a boundary smoothing operation along a boundary between a first partition having a non-rectangular shape (e.g., a triangular shape) and a second partition that are split from an image block. The boundary smoothing operation includes: first-predicting first values of a set of pixels of the first partition along the boundary, using information of the first partition; second-predicting second values of the set of pixels of the first partition along the boundary, using information of the second partition; weighting the first values and the second values; and encoding the first partition using the weighted first values and the weighted second values.
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公开(公告)号:CA3113521A1
公开(公告)日:2019-09-12
申请号:CA3113521
申请日:2019-03-04
Applicant: PANASONIC IP CORP AMERICA
Inventor: ABE KIYOFUMI , KANOH RYUICHI , LI JING YA , LIAO RU LING , LIM CHONG SOON , NISHI TAKAHIRO , SHASHIDHAR SUGHOSH PAVAN , SUN HAI WEI , TEO HAN BOON , TOMA TADAMASA
IPC: H04N19/119 , H04N19/176
Abstract: An encoder (100) that encodes a current block in a picture includes circuitry and memory. Using the memory, the circuitry: splits the current block into a first sub block, a second sub block, and a third sub block in a first direction, the second sub block being located between the first sub block and the third sub block; prohibits splitting the second sub block into two partitions in the first direction; and encodes the first sub block, the second sub block, and the third sub block.
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公开(公告)号:CA3086574A1
公开(公告)日:2019-01-17
申请号:CA3086574
申请日:2018-07-11
Applicant: PANASONIC IP CORP AMERICA
Inventor: OHKAWA MASATO , SAITOU HIDEO , TOMA TADAMASA , NISHI TAKAHIRO , ABE KIYOFUMI , KANOH RYUICHI
Abstract: ABSTRACT A decoder and a method is disclosed that decodes a current block in a picture. The decoder comprises circuitry and a memory. Using the memory, the circuitry performs a first inverse transform on inverse quantized coefficients of the current block using a first inverse transforrn basis without performing a second inverse transform, when the first inverse transform basis used for the first inverse transform is a discrete cosine inverse transform basis. Date Recue/Date Received 2020-07-13
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