公开(公告)号：JP2011040303A

公开(公告)日：2011-02-24

申请号：JP2009187556

申请日：2009-08-12

Applicant: Sony Corp ,  ソニー株式会社

Inventor： AKIBA AKIRA ,  MITARAI TAKASHI ,  IKEDA KOICHI

IPC: H01H59/00 ,  B81B3/00

Abstract: PROBLEM TO BE SOLVED: To provide a connector which can connect and disconnect a plurality of signal routes with a small number of actuators and can miniaturize a MEMS switch, and to provide a switch using this contact. SOLUTION: The connector 1 includes a movable section 10, and two sets of fixed contact electrode pair; and movable contact electrodes 21, 22 are arranged on two side faces of the movable section 10. The fixed contact electrode 31, the movable contact electrode 21, and the fixed contact electrode 32 constitute the first signal route; and the fixed contact electrode 31, the movable contact electrode 22, and the fixed contact electrode 32 constitute the second signal route. The movable section 10 is connected with a driving means (actuator) via a rod (push-pull rod) 40. One of two signal routs is selected since the movable section 10 is displaced in a one-axis direction by connecting with the displacement of the rod 40. COPYRIGHT: (C)2011,JPO&INPIT

Abstract translation: 要解决的问题：提供一种能够利用少量致动器连接和断开多个信号路由并且可以使MEMS开关小型化并且使用该接触来提供开关的连接器。

解决方案：连接器1包括可移动部分10和两组固定接触电极对; 并且可动接触电极21,22设置在可动部10的两个侧面上。固定接触电极31，可动接触电极21和固定接触电极32构成第一信号路径; 并且固定接触电极31，可动接触电极22和固定接触电极32构成第二信号路径。 可移动部分10经由杆（推杆）40与驱动装置（致动器）连接。由于可移动部分10通过与一个轴方向的位移 版权所有（C）2011，JPO＆INPIT

公开(公告)号：JP2011029061A

公开(公告)日：2011-02-10

申请号：JP2009175190

申请日：2009-07-28

Applicant: Sony Corp ,  ソニー株式会社

Inventor： AKIBA AKIRA ,  IKEDA KOICHI

IPC: H01H59/00 ,  H01P1/12

CPC classification number: H01P1/127 ,  H01H59/0009

Abstract: PROBLEM TO BE SOLVED: To provide a shunt switch in which isolation can be improved, and provide a semiconductor device, a module and electronic equipment in which that shunt switch is built-in.
SOLUTION: A transmission line 11 which transmits high frequency signals is grounded to the ground 12 by a shunt line 13. The shunt line 13 is made parallel to two or more impedances Z3 between two or more of those shunt lines 13, which are set higher than an impedance Z2 of the transmission line 11. Generation of returning signal via shunt lines 13A to 13C is suppressed and the impedances Z1 of respective shunt lines 13A to 13C are reduced. Accordingly, isolation in an Off-state (closing operation) is improved.
COPYRIGHT: (C)2011,JPO&INPIT

Abstract translation: 要解决的问题：提供一种可以改善隔离的分流开关，并提供其中内置分流开关的半导体器件，模块和电子设备。 解决方案：传输高频信号的传输线11通过分流线13接地到地面12.分流线13与这些分流线13中的两个或更多个之间的两个或更多个阻抗Z3平行， 被设定为高于传输线路11的阻抗Z2。抑制了通过并联线路13A至13C的返回信号的产生，并且各分流线路13A至13C的阻抗Z1减小。 因此，提高了关闭状态下的隔离（闭合动作）。 版权所有（C）2011，JPO＆INPIT

公开(公告)号：JP2005260398A

公开(公告)日：2005-09-22

申请号：JP2004066721

申请日：2004-03-10

Applicant: Sony Corp ,  ソニー株式会社

Inventor： TADA MASAHIRO ,  IKEDA KOICHI

IPC: H01L27/04 ,  H01L21/82 ,  H01L21/822 ,  H03H3/007 ,  H03H9/24

Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor device with a structure of including a space between an electrode pattern and an electrode film on a substrate that prevents storage of static electricity to the space so as to avoid a defect due to sticking of the electrode film.
SOLUTION: The semiconductor device 1 is provided with: an electrode pattern 10 formed on the substrate; the electrode film 20 located on the electrode pattern 10 via the space; and fitting patterns 11, 21 respectively provided to the electrode pattern 10 and the electrode film 20 and fitting a fuse 30 to bring the same potential to the electrode pattern 10 and the electrode film 20. A manufacturing method of the semiconductor device includes the steps of: forming the electrode pattern 10 onto the substrate; forming the fuse 30 for bringing the same potential to the electrode pattern 10 and the electrode film 20; forming the space between the electrode pattern 10 and the electrode film 20 by removing a sacrifice film; and blowing out the fuse 30.
COPYRIGHT: (C)2005,JPO&NCIPI

Abstract translation: 要解决的问题：为了提供一种半导体器件，其具有在电极图案和基板上的电极膜之间具有空间的结构，其防止静电对空间的存储，以避免由于粘附而导致的缺陷 电极膜。 解决方案：半导体器件1设置有：形成在基板上的电极图案10; 经由空间位于电极图案10上的电极膜20; 以及分别设置到电极图案10和电极膜20并且配合熔丝30以使电极图案10和电极膜20具有相同电位的配合图案11,21。半导体器件的制造方法包括以下步骤： ：将电极图案10形成在基板上; 形成用于使电极图案10和电极膜20具有相同电位的熔丝30; 通过除去牺牲膜形成电极图案10和电极膜20之间的空间; 并吹出保险丝30.版权所有（C）2005，JPO＆NCIPI

公开(公告)号：JP2001077196A

公开(公告)日：2001-03-23

申请号：JP25376999

申请日：1999-09-08

Applicant: SONY CORP

Inventor： HASEGAWA TOSHIAKI ,  IKEDA KOICHI ,  KITO HIDEYOSHI

IPC: H01L21/32 ,  H01L21/311 ,  H01L21/316 ,  H01L21/768 ,  H01L23/522

Abstract: PROBLEM TO BE SOLVED: To provide a method of manufacturing by using a structure of a mask in which the recycling of a resist film is enabled and using a material having a low permittivity in the lowermost layer of the mask when a wiring structure is formed on an interlayer dielectric including a low organic film having a low permittivity. SOLUTION: This semiconductor device comprises the step of forming a 3-layer mask of different materials consisting of a first mask 24, a second mask 22, and a third mask 21 from the bottom layer on an interlayer dielectric 12 including first and second low dielectric constant films 13, 15. The second mask 22 is formed with a film of a material that protects a first film 16 which forms the first mask 24 when the third mask 21 is formed, and the first film 16 is formed with a low permittivity material.

公开(公告)号：JP2000058540A

公开(公告)日：2000-02-25

申请号：JP21942298

申请日：1998-08-03

Applicant: SONY CORP

Inventor： IKEDA KOICHI ,  HASEGAWA TOSHIAKI ,  KOMAI HISANORI

IPC: B05D5/12 ,  C01B33/12 ,  C09D183/06 ,  H01L21/316 ,  H01L21/768

Abstract: PROBLEM TO BE SOLVED: To make a composition for forming low-permittivity insulating film containing the polymer of an alkoxy silane compound having a prescribed molecular weight distribution of a small capacity between wirings and a uniform particle size, by applying the composition to the surface of a substrate and drying the applied surface at a specific temperature, and then, baking the composition at another specific temperature. SOLUTION: A film having a thickness of 500 nm is formed on a substrate which is formed by forming a conductive film composed of aluminum, etc., on a silicon wafer by applying a composition for forming low-permittivity insulating film containing the oligomer of alkoxy silane having a prescribed molecular weight distribution to the substrate. Then, after the applied surface is dried at 50-200 deg.C, the composition is annealed (baked) at 300-500 deg.C. After annealing, a connecting hole is formed through the obtained oxide silicon film and the connecting hole is filled up with tungsten 3. The silicon oxide has a uniform particle size and no void is formed between the sidewall of the silicon oxide film and tungsten film. Therefore, a highly reliable insulating film can be obtained.