公开(公告)号：JPH07164656A

公开(公告)日：1995-06-27

申请号：JP11464394

申请日：1994-04-28

Applicant: SONY CORP

Inventor： MATSUDA OSAMU ,  KOBAYASHI TOSHIMASA ,  SATO SHUJI ,  HIRANO EIKI ,  SHINOZAKI KENJI ,  FUJIOKA TAKAYUKI

IPC: B41J2/32 ,  B41J2/005 ,  B41J2/14 ,  B41J2/16 ,  B41J2/315 ,  B41J2/325 ,  B41J2/44 ,  B41M5/00 ,  B41M5/26

Abstract: PURPOSE:To enable recording of high quality by providing voids to recording material gasifying parts so as to allow them to be present in a recording material to accelerate the gassification of the recording material to efficiently perform recording. CONSTITUTION:The solid powdery hot melt dye 12 in each solid dye receiving tank 11 is heated to the m.p. thereof by a heater 16 to be melted (liquefied) and the liquefied dye 22 is quantitatively supplied to the upper surface of the bead aggregate 20 within the gasifying hole 17a of each gasifying part 17 by the capillary phenomenon caused by the bead aggregate 20. In this state, one paper 50 to be recorded is held between a paper feed drive roller and a pressure contact follower roller and one dot signal is sent to a head part 10 at every one line and one color and the laser beam L generated from each semiconductor laser chip 18 is gathered to the upper surface of the bead aggregate 20.

公开(公告)号：JPH06326051A

公开(公告)日：1994-11-25

申请号：JP13670893

申请日：1993-05-14

Applicant: SONY CORP

Inventor： KOBAYASHI TOSHIMASA

IPC: H01L21/28 ,  H01L21/285 ,  H01L29/45

Abstract: PURPOSE:To provide an ohmic electrode capable of obtaining an excellent ohmic contact even through alloying treatment at a comparatively low temperature and proper to a compound semiconductor device and a forming method thereof. CONSTITUTION:An ohmic electrode is manufactured by a method wherein a first metallic layer 14 consisting of indium or an indium alloy is formed onto a compound semiconductor layer 10, a second metallic layer 16 composed of gold-germanium is formed onto the first metallic layer 14 and such first metallic layer 14 and second metallic layer 16 are alloyed and treated. The forming method of the ohmic electrode is made up of processes, in which (a) the first metallic layer consisting of indium or the indium alloy is shaped onto the compound semiconductor layer, (b) the second metallic layer composed of gold- germanium is formed onto the first metallic layer and (c) such first metallic layer and second metallic layer are heated at a temperature of 350 deg.C or lower and alloyed and treated.

公开(公告)号：JPH06310811A

公开(公告)日：1994-11-04

申请号：JP9783793

申请日：1993-04-23

Applicant: SONY CORP

Inventor： OZAWA MASABUMI ,  NAKAYAMA NORIKAZU ,  KOBAYASHI TOSHIMASA ,  MIYAJIMA TAKAO ,  NARUI FUMIYO

IPC: H01L33/04 ,  H01L33/14 ,  H01L33/28 ,  H01L33/30 ,  H01L33/40 ,  H01L33/44 ,  H01S5/00 ,  H01S3/18 ,  H01L33/00

Abstract: PURPOSE:To make it possible to manufacture a target II-VI compound semiconductor element reliably and stably by a method wherein a treatment temperature accompanied by a heating in a process of manufacturing the II-VI compound semiconductor element is selected at a specified or lower temperature. CONSTITUTION:A first clad layer 2 consisting of a ZnMgSSe layer of the same conductivity type as that of a first conductivity type substrate 1, an active layer 3 consisting of an undoped or low-impurity concentration Zn(Cd)Se layer, a second clad layer 4 consisting of a second conductivity type ZnMgSSe layer and a cap layer 5 consisting of a superlattice structure, which consists of a thin ZnSe layer and a thin ZnTe layer, are epitaxially grown in order on the first conductivity type substrate 1, such as a GaAs substrate, by an MBE method. In this case, a heating treatment temperature accompanied by the manufacture of a laser is restricted to 400 deg.C or lower. The blue light laser obtained in such a way can be formed in prescribed characteristics stably and reliably.

公开(公告)号：JPH06216367A

公开(公告)日：1994-08-05

申请号：JP2198393

申请日：1993-01-14

Applicant: SONY CORP

Inventor： KOBAYASHI TOSHIMASA

IPC: H01L29/43 ,  H01L21/28 ,  H01L33/28 ,  H01L33/30 ,  H01L33/38 ,  H01L33/40 ,  H01S5/00 ,  H01S5/042 ,  H01L29/46 ,  H01S3/18

Abstract: PURPOSE:To provide an ohmic electrode excellent in both contact resistance and adhesion, by a method wherein the contact resistance of first material to semiconductor is lower than the contact resistance of second material and the semiconductor, and adhesion of the second material to the semiconductor is superior to the adhesion of the first material to the semiconductor. CONSTITUTION:An ohmic electrode 2 constituted of a first electrode part 2a and a second electrode part 2b which are in contact with semiconductor 1 are formed on the semiconductor 1. The first electrode is made of ohmic electrode material whose contact resistance to the semiconductor 1 is lower than that of the second electrode part 2b. The second electrode part 2b is made of ohmic electrode material whose adhesion to the semiconductor 1 is superior to that of the first electrode part 2a. Thereby the ohmic electrode 2 wherein contact resistance is low as a whole and adhesion is excellent is realized.

公开(公告)号：JPH03139844A

公开(公告)日：1991-06-14

申请号：JP27826689

申请日：1989-10-25

Applicant: SONY CORP

Inventor： KAWAI HIROHARU ,  KOBAYASHI TOSHIMASA ,  NAKAMURA FUMIHIKO

IPC: H01L29/73 ,  H01L21/331 ,  H01L29/205 ,  H01L29/737

Abstract: PURPOSE:To make the values of a parasitic collector capacitance and the resistance of an outer base small and to facilitate wiring by providing an outer base region which is formed by selectively growing a second-conductivity type compound semiconductor layer again so that the region is thinner than a collector region around a base region, and making one end part of the collector region thinner than the other part. CONSTITUTION:A base electrode 8 is formed on the thick part of a P type GaAs layer 4. A collector electrode 9 is formed on a stripe-shaped n type GaAs layer 6 and an n-type GaAs layer 5. The thickness of one end part of the stripe-shaped n-type GaAs layer 5 constituting a collector region is made considerably small at, e.g. about 0.2mum. Therefore, the step of the this one end part is low. Thus a collector wiring which is connected to the collector electrode 9 at this one end can be readily formed. The thickness of an outer base region which is obtained by selectively growing the P GaAs layer again is made smaller than the thickness of the n-type GaAs layer 5 and then n type GaAs layer 6 at the parts of an active region. Thus, a base wiring can be readily formed.

公开(公告)号：JPH0344936A

公开(公告)日：1991-02-26

申请号：JP17974889

申请日：1989-07-12

Applicant: SONY CORP

Inventor： KAWAI HIROHARU ,  NAKAMURA FUMIHIKO ,  KOBAYASHI TOSHIMASA

IPC: H01L29/73 ,  H01L21/331 ,  H01L29/205 ,  H01L29/737

Abstract: PURPOSE:To increase a current amplification factor beta by forming a composition gradient layer formed of AlGaInAs between a base and a collector and varying in Al composition continuously. CONSTITUTION:A n type InP layer 2 for forming a sub collector layer is formed on a n type InP board 1, an undoped InP layer 3 for forming a collector layer is formed thereon, and a n type AlxGa1-xInAs composition gradient layer 4 is formed thereon. An undoped GaInAs layer 5 for forming a spacer layer is formed on the layer 4, a p type GaInAs layer 6 for forming a base layer is formed thereon, and an undoped GaInAs layer 7 for forming a spacer layer is formed thereon. A n-type InP layer 8, a n type GaInAs layer 9, and an emitter electrode 10 are formed on the layer 7. A base electrode 10 and a collector electrode 12 are formed on the layer 6. Thus, the step of a conduction band end existing between the base and the collector can be leveled out.

公开(公告)号：JP2011223017A

公开(公告)日：2011-11-04

申请号：JP2011130217

申请日：2011-06-10

Applicant: Sony Corp ,  ソニー株式会社

Inventor： KOBAYASHI TOSHIMASA ,  YAMAGUCHI KYOJI

IPC: H01S5/323 ,  H01L21/338 ,  H01L29/786 ,  H01L29/812 ,  H01L31/10 ,  H01L33/32

Abstract: PROBLEM TO BE SOLVED: To provide a method of manufacturing a semiconductor device including a compound semiconductor layer with excellent crystallinity, especially a group III nitride compound semiconductor layer.SOLUTION: A method of manufacturing a semiconductor device comprises: a step of depositing a base layer on a sapphire substrate; a step of forming a stripe-shaped pattern mask of a SiOfilm on the base layer and etching the base layer and an upper part of the sapphire substrate to form a convexo-concave structure periodically having a stripe-shaped convex part and a groove-shaped concave part; a step of growing a GaN layer on the convexo-concave structure using a lateral growth method; a step of forming an identification mark on at least one surface of the substrate before (or after) the lateral growth step; and a positioning step of positioning a semiconductor device formation region on a low-defect density region with reference to the identification mark. An identification of a low-defect density region and a positioning of a semiconductor device formation region are performed by using alternate and periodical formation of a low-defect density region and a high-defect density region.

Abstract translation: 解决的问题：提供一种制造包括具有优异结晶度的化合物半导体层，特别是III族氮化物化合物半导体层的半导体器件的方法。 解决方案：制造半导体器件的方法包括：在蓝宝石衬底上沉积基底层的步骤; 在基底层上形成SiO 2薄膜的条形图案掩模的步骤，并且蚀刻基底层和蓝宝石衬底的上部以形成凸凹 周期性地具有条形凸部和凹槽形凹部的结构; 使用横向生长法在凸凹结构上生长GaN层的步骤; 在横向生长步骤之前（或之后）在所述基底的至少一个表面上形成识别标记的步骤; 以及参照识别标记将半导体器件形成区域定位在低缺陷密度区域上的定位步骤。 通过使用低缺陷密度区域和高缺陷密度区域的交替和周期性形成来执行半缺陷密度区域的识别和半导体器件形成区域的定位。 版权所有（C）2012，JPO＆INPIT

公开(公告)号：JP2007165726A

公开(公告)日：2007-06-28

申请号：JP2005362263

申请日：2005-12-15

Applicant: Sony Corp ,  ソニー株式会社

Inventor： KOBAYASHI TOSHIMASA ,  WATABE YOSHIAKI ,  KURAMOCHI NAOYOSHI ,  HITSUDA YUKIHISA ,  YASUDA ATSUSHI

IPC: H01L33/10 ,  H01L33/24 ,  H01L33/32 ,  H01L33/36 ,  H01L33/46

Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor light-emitting diode capable of improving light extraction efficiency. SOLUTION: In a first region 10A, a pn junction section 14 is composed of an n-type layer 12 and a p-type layer 13, and a p-side electrode 21 is formed on the p-type layer 13. A second region 10B includes a partial region of the n-type layer 12 and an n-side electrode 22 is provided. An inclined section 30 including one portion of the pn junction section 14 is provided at a boundary section 10C between both of them. A high reflection film 42 made of aluminum Al, silver Ag, and the like is provided at the inclined section 30, and light reaching the inclined section 30 is reflected by the high reflection film 42 and is extracted to the outside efficiently. COPYRIGHT: (C)2007,JPO&INPIT

Abstract translation: 解决的问题：提供能够提高光提取效率的半导体发光二极管。 解决方案：在第一区域10A中，pn结部分14由n型层12和p型层13构成，p侧电极21形成在p型层13上。 第二区域10B包括n型层12的部分区域和n侧电极22。 包括pn结部14的一部分的倾斜部30设置在两者之间的边界部10C。 由铝Al，银Ag等构成的高反射膜42设置在倾斜部分30处，并且到达倾斜部分30的光被高反射膜42反射并被有效地提取到外部。 版权所有（C）2007，JPO＆INPIT

公开(公告)号：JP2007157853A

公开(公告)日：2007-06-21

申请号：JP2005348294

申请日：2005-12-01

Applicant: Sony Corp ,  ソニー株式会社

Inventor： WATABE YOSHIAKI ,  HINO TOMOKIMI ,  KOBAYASHI TOSHIMASA ,  NARUI HIRONOBU

IPC: H01L33/10 ,  H01L33/12 ,  H01L33/20 ,  H01L33/32

CPC classification number: H01L33/405 ,  H01L33/32 ,  H01L33/44

Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor light-emitting element having a high reflection factor and excellent electrical contact of a light reflection layer and a semiconductor layer. SOLUTION: The semiconductor layer 20, the light reflection layer 30, and a protective layer 31 are laminated on a substrate 10 in this order. The semiconductor layer 20 is composed by laminating a buffer layer 21, a GaN layer 22, an n-type contact layer 23, an n-type cladding layer 24, an active layer 25, a p-type cladding layer 26, and a p-type contact layer 27 in this order. The light reflection layer 30 is formed by heating the substrate 10 in a temperature range of, for example, 100°C or higher and less than 400°C; and depositing an Ag alloy on the surface of the p-type contact layer 27. The semiconductor layer 20, the light reflection layer 30, and the protection layer 31 are heat-treated by forming the semiconductor layer 20, the light reflection layer 30, and the protection layer 31; and then setting ambient temperature in a temperature range that is higher than that when heating the substrate during a prescribed time range. COPYRIGHT: (C)2007,JPO&INPIT

Abstract translation: 要解决的问题：提供具有高反射率和光反射层和半导体层的优异电接触的半导体发光元件。 解决方案：半导体层20，光反射层30和保护层31依次层压在基板10上。 半导体层20通过层叠缓冲层21，GaN层22，n型接触层23，n型覆层24，有源层25，p型覆层26和p 型接触层27。 光反射层30通过在例如100℃以上且小于400℃的温度范围内加热基板10而形成; 并在p型接触层27的表面上沉积Ag合金。半导体层20，光反射层30和保护层31通过形成半导体层20，光反射层30， 和保护层31; 然后将环境温度设定在比规定时间范围内加热基板时高的温度范围。 版权所有（C）2007，JPO＆INPIT

公开(公告)号：JP2005268725A

公开(公告)日：2005-09-29

申请号：JP2004083095

申请日：2004-03-22

Applicant: Sony Corp ,  ソニー株式会社

Inventor： KOBAYASHI TOSHIMASA

IPC: H01L21/306 ,  H01L33/22 ,  H01L33/32 ,  H01S5/323 ,  H01L33/00

Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor element in which adverse effects due to damage occurring during polishing or dry etching in a manufacturing process are eliminated, and a problem of difficulty in patterning by wet etching is solved, consequently reliability is improved. SOLUTION: A p-side contact layer 21, a p-type clad layer 22, an active layer 30, n-type clad layer 41, and n-side contact layer 42 are stacked in this order on a side of one surface of a substrate 10 comprising p-type semiconductor. The p-side contact layer 21 is made as a layer to be processed having a surface 61 for recovering damage formed by wet etching after processing by dry etching. A p-side electrode 71 is provided on the damage recovery surface 61 of the p-side contact layer 21. The adverse effects due to damage occurring during dry etching is prevented, and conduction between the p-side contact layer 21 and the p-side electrode 71 is improved, consequently reliability is improved. COPYRIGHT: (C)2005,JPO&NCIPI

Abstract translation: 要解决的问题：提供一种半导体元件，其中消除了在制造过程中在抛光或干蚀刻期间发生的损坏的不利影响，并且解决了通过湿蚀刻难以构图的问题，从而提高了可靠性 。

解决方案：将p侧接触层21，p型覆盖层22，有源层30，n型覆盖层41和n侧接触层42依次层叠在一侧 包括p型半导体的衬底10的表面。 p侧接触层21被制成具有用于回收通过干法蚀刻加工之后由湿蚀刻形成的损伤的表面61的被处理层。 p侧电极71设置在p侧接触层21的损伤恢复面61上。防止由于在干法蚀刻期间发生的损伤而产生的不良影响，p侧接触层21和p侧电极71之间的导通。 改善了侧面电极71，从而提高了可靠性。 版权所有（C）2005，JPO＆NCIPI