1.
    发明专利
    未知

    公开(公告)号:DE69926856T2

    公开(公告)日:2006-05-18

    申请号:DE69926856

    申请日:1999-11-25

    Applicant: SONY CORP

    Abstract: A GaN compound semiconductor laser includes an AlGaN buried layer which buries opposite sides of a ridge stripe portion formed on a p-type AlGaN cladding layer. The AlGaN buried layer is made by first patterning an upper part of the p-type AlGaN cladding layer and a p-type GaN contact layer into a ridge stripe configuration by using a SiO2 film as an etching mask, then growing the AlGaN buried layer non-selectively on the entire substrate surface to bury both sides of the ridge stripe portion under the existence of the SiO2 film on the ridge stripe portion, and thereafter selectively removing the AlGaN buried layer from above the ridge stripe portion by etching using the SiO2 film as an etching stop layer. Thus, the GaN compound semiconductor laser is stabilized in the transverse mode, intensified in output power, and improved in lifetime.

    2.
    发明专利
    未知

    公开(公告)号:DE69415210D1

    公开(公告)日:1999-01-28

    申请号:DE69415210

    申请日:1994-05-04

    Applicant: SONY CORP

    Abstract: An ohmic electrode and a process for fabricating the same, said process comprising forming a first metallic layer (14) comprising indium or an indium alloy on a compound semiconductor layer (10), forming a second metallic layer (16) comprising a gold-germanium alloy on said first metallic layer (14), and subjecting the first and the second metallic layer thus obtained to alloying treatment. The present invention provides favorable ohmic contacts by effecting the alloying treatment at a relatively low temperature of 350 DEG C or even lower.

    3.
    发明专利
    未知

    公开(公告)号:DE69926856D1

    公开(公告)日:2005-09-29

    申请号:DE69926856

    申请日:1999-11-25

    Applicant: SONY CORP

    Abstract: A GaN compound semiconductor laser includes an AlGaN buried layer which buries opposite sides of a ridge stripe portion formed on a p-type AlGaN cladding layer. The AlGaN buried layer is made by first patterning an upper part of the p-type AlGaN cladding layer and a p-type GaN contact layer into a ridge stripe configuration by using a SiO2 film as an etching mask, then growing the AlGaN buried layer non-selectively on the entire substrate surface to bury both sides of the ridge stripe portion under the existence of the SiO2 film on the ridge stripe portion, and thereafter selectively removing the AlGaN buried layer from above the ridge stripe portion by etching using the SiO2 film as an etching stop layer. Thus, the GaN compound semiconductor laser is stabilized in the transverse mode, intensified in output power, and improved in lifetime.

    SEMICONDUCTOR DEVICE, ITS MANUFACTURING METHOD AND SUBSTRATE FOR MANUFACTURING A SEMICONDUCTOR DEVICE

    公开(公告)号:MY122220A

    公开(公告)日:2006-03-31

    申请号:MYPI9900819

    申请日:1999-03-05

    Applicant: SONY CORP

    Abstract: IT IS INTENDED TO PROVIDE A SEMICONDUCTOR DEVICE, ITS MANUFACTURING METHOD AND SUBSTRATE FOR MANUFACTURING THE SEMICONDUCTOR DEVICE WHICH ENSURES THAT GOOD CLEAVABLE SURFACES BE MADE STABLY IN A SEMICONDUCTOR LAYER UNDER PRECISE CONTROL UPON MAKING EDGES OF CLEAVES SURFACES IN THE SEMICONDUCTOR LAYER STACKED ON A SUBSTRATE EVEN WHEN THE SUBSTRATE IS NON-CLEAVABLE, DIFFICULT TO CLEAVE OR DIFFERENT IN CLEAVABLE ORIENTATION FROM THE SEMICONDUCTOR LAYER. A SEMICONDUCTOR LAYER (2) MADE OF III-V COMPOUND SEMICONDUCTORS IS STACKED TO FORM A LASER STRUCTURE ON A SAPPHIRE SUBSTRATE (1). IN SELECTIVE LOCATIONS OTHER THAN THE LOCATION OF A RIDGE STRIPE PORTION (11) AND A MESA PORTION (12) ALONG A PORTION OF A SEMICONDUCTOR LAYER (2) WHERE A CAVITY EDGE (3) SHOULD BE MADE, NAMELY, IN LOCATIONS AT OPPOSITE SIDES OF THE MESA PORTION (12), STRIPE-SHAPED CLEAVAGE-ASSIST GROOVES (4) ARE MADE TO EXTEND IN PARALLEL TO THE (11-20)-ORIENTED SURFACE OF THE SEMICONDUCTOR LAYER (2), AND THE SEMICONDUCTOR LAYER (2) AND THE SAPPHIRE SUBSTRATE (1) ARE CLEAVED FROM THE CLEAVAGE-ASSIST GROOVE (4) TO MAKE THE CAVITY EDGE (3) MADE UP OF THE CLEAVABLE SURFACE OF THE SEMICONDUCTOR LAYER (2).

    Semiconductor device its manufacturing method and substrate for manufacturing a semiconductor device

    公开(公告)号:SG77227A1

    公开(公告)日:2000-12-19

    申请号:SG1999001313

    申请日:1999-03-06

    Applicant: SONY CORP

    Abstract: It is intended to provide a semiconductor device, its manufacturing method and substrate for manufacturing the semiconductor device which ensures that good cleavable surfaces be made stably in a semiconductor layer under precise control upon making edges of cleaves surfaces in the semiconductor layer stacked on a substrate even when the substrate is non-cleavable, difficult to cleave or different in cleavable orientation from the semiconductor layer. A semiconductor layer 2 made of III-V compound semiconductors is stacked to form a laser structure on a sapphire substrate 1. In selective locations other than the location of a ridge stripe portion 11 and a mesa portion 12 along a portion of a semiconductor layer 2 where a cavity edge 3 should be made, namely, in locations at opposite sides of the mesa portion 12, stripe-shaped cleavage-assist grooves 4 are made to extend in parallel to the (11-20)-oriented surface of the semiconductor layer 2, and the semiconductor layer 2 and the sapphire substrate 1 are cleaved from the cleavage-assist groove 4 to make the cavity edge 3 made up of the cleavable surface of the semiconductor layer 2.

    6.
    发明专利
    未知

    公开(公告)号:DE69415210T2

    公开(公告)日:1999-06-24

    申请号:DE69415210

    申请日:1994-05-04

    Applicant: SONY CORP

    Abstract: An ohmic electrode and a process for fabricating the same, said process comprising forming a first metallic layer (14) comprising indium or an indium alloy on a compound semiconductor layer (10), forming a second metallic layer (16) comprising a gold-germanium alloy on said first metallic layer (14), and subjecting the first and the second metallic layer thus obtained to alloying treatment. The present invention provides favorable ohmic contacts by effecting the alloying treatment at a relatively low temperature of 350 DEG C or even lower.

    Semiconductor light-emitting element, and method of manufacturing same
    7.
    发明专利
    Semiconductor light-emitting element, and method of manufacturing same 审中-公开
    半导体发光元件及其制造方法

    公开(公告)号:JP2007157852A

    公开(公告)日:2007-06-21

    申请号:JP2005348293

    申请日:2005-12-01

    CPC classification number: H01L21/244 H01L33/32 H01L33/405 H01L33/44

    Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor light-emitting element having a high reflection factor and excellent electrical contact of a light reflection layer and a semiconductor layer. SOLUTION: The semiconductor layer 20, an underlayer 30, and the light reflection layer 31 are laminated in this order. The semiconductor layer 20 is composed by laminating a buffer layer 21, a GaN layer 22, an n-type contact layer 23, an n-type cladding layer 24, an active layer 25, a p-type cladding layer 26, and a p-type contact layer 27 in this order. The underlayer 30 is formed on the surface of the p-type contact layer 27, Ag (silver) is added to a transition metal, and the underlayer 30 has a thickness of 1 nm or more and 10 nm or less. The light reflection layer 31 is formed on the surface of the underlayer 30, and a prescribed substance is added to Ag. COPYRIGHT: (C)2007,JPO&INPIT

    Abstract translation: 要解决的问题:提供具有高反射率和光反射层和半导体层的优异电接触的半导体发光元件。 解决方案:半导体层20,底层30和光反射层31依次层叠。 半导体层20通过层叠缓冲层21,GaN层22,n型接触层23,n型覆层24,有源层25,p型覆层26和p 型接触层27。 底层30形成在p型接触层27的表面上,Ag(银)被添加到过渡金属中,底层30的厚度为1nm以上且10nm以下。 光反射层31形成在底层30的表面上,并且将规定的物质添加到Ag。 版权所有(C)2007,JPO&INPIT

    Nitride compound semiconductor device and method of manufacturing the same
    8.
    发明专利
    Nitride compound semiconductor device and method of manufacturing the same 审中-公开
    氮化物半导体器件及其制造方法

    公开(公告)号:JP2005038873A

    公开(公告)日:2005-02-10

    申请号:JP2003196940

    申请日:2003-07-15

    Abstract: PROBLEM TO BE SOLVED: To provide a method of manufacturing a nitride compound semiconductor device which employs a layer that can be subjected to wet etching as the etch stopper layer to control the structure with high accuracy in a crystal growth stage.
    SOLUTION: An n-type contact layer 11, an n-type clad layer 12, an active layer 13, and a p-type first clad layer 14A are formed on a substrate 10, and then an etch stopper layer 19 is formed on the p-type first clad layer 14A. The etch stopper layer 19 can be etched with a strong acid or a strong alkali. The layers (a p-type first clad layer 14B and a p-type contact layer 15) above the etch stopper layer 19 are subjected to etching, and then the etch stopper layer 19 is processed by wet etching to form a ridge 16. The p-type first clad layer 14A can be made uniform in thickness without affected by dry etching.
    COPYRIGHT: (C)2005,JPO&NCIPI

    Abstract translation: 要解决的问题:提供一种制造氮化物半导体器件的方法,该氮化物化合物半导体器件采用可进行湿蚀刻的层作为蚀刻停止层,以在晶体生长阶段以高精度控制结构。 解决方案:在衬底10上形成n型接触层11,n型覆盖层12,有源层13和p型第一覆盖层14A,然后将蚀刻停止层19 形成在p型第一包层14A上。 蚀刻停止层19可以用强酸或强碱进行蚀刻。 对蚀刻停止层19之上的层(p型第一包层14B和p型接触层15)进行蚀刻,然后通过湿蚀刻处理蚀刻停止层19以形成脊16。 可以使p型第一包层14A的厚度均匀,而不受干蚀刻的影响。 版权所有(C)2005,JPO&NCIPI

    NITRIDE SEMICONDUCTOR LASER ELEMENT AND ITS MANUFACTURING METHOD

    公开(公告)号:JP2002335048A

    公开(公告)日:2002-11-22

    申请号:JP2002045986

    申请日:2002-02-22

    Applicant: SONY CORP

    Abstract: PROBLEM TO BE SOLVED: To provide a nitride semiconductor laser element having a low operating voltage and good stability of the transverse mode. SOLUTION: The semiconductor laser element 10 has a structure composed of first contact layer 14, a first clad layer 16, an active layer 20, a second clad layer 24, a second contact layer 26, and a second electrode 30 laminated one above another. The second clad layer 24 is composed of an upper and lower layers 24A, 24B; the first clad layer 14, the active layer 20 and the lower layer 24A of the second clad layer have mesa structures; the upper layer 24B of the second clad layer and the second contact layer 26 have ridge structures; an insulation layer 40 is formed on a part of the lower layer 24A of the second clad layer corresponding to the top face of the mesa structure, so as to cover at least part of both sides of the upper layer 24B of the second clad layer; and a metal layer 42 having substantially the same width as that of the mesa structure is formed from the top face of the insulation layer 40 to the top face of the second electrode 30.

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