公开(公告)号：JP2009151032A

公开(公告)日：2009-07-09

申请号：JP2007327950

申请日：2007-12-19

Applicant: Sony Corp ,  ソニー株式会社

Inventor： IKEDA MASANOBU ,  TANAKA TSUTOMU ,  KUNII MASABUMI ,  ITO RYOICHI ,  INO MASUMITSU

IPC: G09F9/30 ,  G02F1/1335 ,  G02F1/13357 ,  G02F1/1362 ,  G09F9/00

Abstract: PROBLEM TO BE SOLVED: To achieve improvement of image quality and position detecting accuracy of a position sensor element. SOLUTION: A photosensor element 32a is formed such that a semiconductor layer 47 which receives and photoelectrically converts light incident from a front side of a liquid crystal panel 200 and then generates light receiving data, may have a vertical structure where a current flows in a normal direction z of the surface of the liquid crystal panel 200. COPYRIGHT: (C)2009,JPO&INPIT

Abstract translation: 要解决的问题：为了实现位置传感器元件的图像质量和位置检测精度的提高。 解决方案：光电元件32a形成为使得接收并光电转换从液晶面板200的前侧入射的光然后产生光接收数据的半导体层47可以具有电流流动的垂直结构 在液晶面板200的表面的法线方向z。版权所有（C）2009，JPO＆INPIT

公开(公告)号：JP2009139565A

公开(公告)日：2009-06-25

申请号：JP2007314912

申请日：2007-12-05

Applicant: Sony Corp ,  ソニー株式会社

Inventor： GOSAIN DARAM PAL ,  TANAKA TSUTOMU ,  KUNII MASABUMI

IPC: G02F1/1333 ,  G02F1/13 ,  G02F1/13357 ,  G02F1/1368 ,  G09F9/00

Abstract: PROBLEM TO BE SOLVED: To detect a position of a body to be sensed in a display region and to further improve an S/N ratio of data obtained by the photodetector receiving IR emitted from an illumination section, by making the photodetector receive, in one surface side of a display panel, reflection light of illumination light reflected by the body to be sensed. SOLUTION: A position sensor element 32a includes a semiconductor layer 47 having a band gap narrower than that of a silicon semiconductor and reflection light H is received by the position sensor 32a in the semiconductor layer 47. COPYRIGHT: (C)2009,JPO&INPIT

Abstract translation: 要解决的问题：为了检测在显示区域中要感测的身体的位置，并且进一步提高由接收从照明部发出的IR的光电检测器获得的数据的S / N比，通过使光电检测器接收 在显示面板的一个表面侧，由待感测的身体反射的照明光的反射光。 解决方案：位置传感器元件32a包括具有比硅半导体窄的带隙的半导体层47，并且反射光H被半导体层47中的位置传感器32a接收。版权所有（C） ）2009，JPO＆INPIT

公开(公告)号：JP2007250944A

公开(公告)日：2007-09-27

申请号：JP2006074051

申请日：2006-03-17

Applicant: Sony Corp ,  ソニー株式会社

Inventor： KUNII MASABUMI

IPC: H01L21/205 ,  C23C16/455 ,  H01L21/336 ,  H01L29/786

Abstract: PROBLEM TO BE SOLVED: To provide a method and apparatus for depositing a semiconductor thin film capable of obtaining a crystalline semiconductor thin film with excellent film quality when forming the crystalline semiconductor thin film on a substrate.
SOLUTION: The method of depositing the crystalline semiconductor thin film on the surface of the substrate supplies etching gas and film forming gas containing a semiconductor material to the heated substrate surface, so as to apply thermochemical reaction to the etching gas and the film forming gas on the substrate surface. The etching gas and the film forming gas are supplied to the whole substrate surface from a shower plate 17 oppositely arranged to the substrate surface and kept in a cooling state by a cooling pipe 18.
COPYRIGHT: (C)2007,JPO&INPIT

Abstract translation: 要解决的问题：提供一种在衬底上形成晶体半导体薄膜时能够获得具有优异膜质量的结晶半导体薄膜的半导体薄膜的沉积方法和装置。 解决方案：在衬底表面上沉积晶体半导体薄膜的方法将含有半导体材料的蚀刻气体和成膜气体提供给加热的衬底表面，以将蚀刻气体和膜的热化学反应 在基板表面上形成气体。 蚀刻气体和成膜气体从与基板表面相对布置的喷淋板17供给到整个基板表面，并通过冷却管18保持在冷却状态。版权所有（C）2007，JPO＆INPIT

公开(公告)号：JP2002124678A

公开(公告)日：2002-04-26

申请号：JP2000313664

申请日：2000-10-13

Applicant: SONY CORP

Inventor： KUNII MASABUMI

IPC: G02F1/136 ,  G02F1/1368 ,  G09F9/30 ,  H01L21/31 ,  H01L21/316 ,  H01L21/324 ,  H01L21/336 ,  H01L21/8238 ,  H01L27/092 ,  H01L27/32 ,  H01L29/786 ,  H01L51/50 ,  H05B33/14

Abstract: PROBLEM TO BE SOLVED: To provide a thin film transistor manufacturing method which can suppress the heat shrinkage of a low melting point glass substrate, whereas a high quality thermal oxide film is formed on the glass substrate. SOLUTION: The method of manufacturing thin film transistors each having a laminate structure including a semiconductor thin film 5, an oxide film 3 and a gate electrode comprises a step of forming an amorphous silicon semiconductor thin film 5 on an insulative substrate 0, a step of patterning the semiconductor film 5 like inlands to form element regions of the thin film transistors, and a step of forming a gate oxide film 3 on the thin film 5 before or after the element region forming step. The oxide film forming step combines a process of depositing a silicon oxide on the thin film 5 with a process of thermally oxidating the thin film 5 in a pressured atmosphere containing a gas having an oxidation power to form a silicon oxide film, thereby reducing the heating time.

公开(公告)号：JP2000133806A

公开(公告)日：2000-05-12

申请号：JP30620598

申请日：1998-10-28

Applicant: SONY CORP

Inventor： SUGANO YUKIYASU ,  KUNII MASABUMI ,  URAZONO TAKENOBU

IPC: H01L29/786 ,  H01L21/336

Abstract: PROBLEM TO BE SOLVED: To improve hydrogenation treatment of a polycrystalline semiconductor thin film and obtain a state of high mobility for a thin-film transistor. SOLUTION: When a thin-film transistor is manufactured by forming a lamination structure on an insulating substrate 11, which a structure includes a polycrystalline semiconductor thin film, a gate insulating film which is in contact with one surface side of the thin film, and a gate electrode stacked on the semiconductor thin film via the gate insulating film, active hydrogen is formed by bringing a material gas containing hydrogen into contact with a catalyzer 73 heated at 1,000 deg.C to 2,000 deg.C, and crystal defects are repaired by introducing active hydrogen in the semiconductor thin film.

公开(公告)号：JPH11233790A

公开(公告)日：1999-08-27

申请号：JP5440498

申请日：1998-02-18

Applicant: SONY CORP

Inventor： KUNII MASABUMI

IPC: H01L21/336 ,  H01L21/77 ,  H01L21/84 ,  H01L27/12 ,  H01L29/49 ,  H01L29/786

Abstract: PROBLEM TO BE SOLVED: To easily control the threshold voltage of a thin film transistor. SOLUTION: A thin film transistor has a laminated structure containing a polycrystalline semiconductor thin film 5, a gate oxide film formed in contact with one surface of the thin film 5, and a gate electrode 1 provided on the thin film 5 with the oxide film 3 in between. At the time of manufacturing the thin film transistor, an injecting process of forming the source area S and drain area D of the transistor by selectively injecting an impurity into the thin film 5 is performed. Then, the injected impurity is activated by a rapid heating method by performing a rapid heating process and, at the same time, the threshold voltage o the transistor is controlled by adjusting the treating conditions of the rapid heating method. In the rapid heating process, the semiconductor thin film 5 is made endothermic by irradiating the thin film 5 with ultraviolet rays after an insulating substrate 0 is gradually heated and the film 5 is gradually cooled.

公开(公告)号：JPH10229200A

公开(公告)日：1998-08-25

申请号：JP4711497

申请日：1997-02-14

Applicant: SONY CORP

Inventor： KUNII MASABUMI

IPC: H01L21/20 ,  H01L21/268 ,  H01L21/336 ,  H01L29/786

Abstract: PROBLEM TO BE SOLVED: To make recrystallization uniform and optimum by laser annealing of a semiconductor film to form an active layer of a bottom-gate type thin-film transistor and reduce the gate wiring resistance. SOLUTION: This device comprises thin-film transistors 4, integrated on an insulation substrate 5. Each transistor has a bottom gate structure, composed of a gate electrode 1, a gate insulation film 2, and a semiconductor film 3 laminated, in this order. A gate wiring 6, connected to the gate electrode of each transistor 4 is formed on the substrate 5 and composed of integral parts 6a, integrated with the gate electrodes 5 and separate parts 6b interconnecting them. The gate electrode 1 has a thermal conductivity lower than that of the separate parts 6b which have a lower electric resistance than that of the gate electrode 1. The semiconductor film 3 has a polycrystalline structure, recrystallized by energy irradiation.

公开(公告)号：JPH10150203A

公开(公告)日：1998-06-02

申请号：JP32620996

申请日：1996-11-20

Applicant: SONY CORP

Inventor： KUNII MASABUMI ,  KANETANI YASUHIRO

IPC: H01L21/20 ,  H01L21/336 ,  H01L29/786

Abstract: PROBLEM TO BE SOLVED: To enable a semiconductor thin film to be doped with impurities low but uniform in concentration in a low-temperature process. SOLUTION: A chemical vapor deposition is carried out using a mixed material gas of semiconductor film forming gas and dopant gas, whereby a non-single crystal semiconductor thin film 2 is deposited on an insulating substrate 1 to serve as an active layer. Dopant contained in the semiconductor thin film 2 is activated by irradiation with an energy beam 3 so as to previously control a semiconductor transistor in threshold voltage. The semiconductor thin film 2 is processed into a transistor by integration. When B2 H6 diluted with hydrogen or helium and SiH4 are used as dopant gas and semiconductor film forming gas respectively, the mixing ratio of B2 H6 to SiH4 is set at 30ppm or less. When a non-single crystal silicon semiconductor thin film is turned polycrystalline at the same time with the activation of impurities, the energy beam 3 is optimized in energy density so as to make the crystal silicon semiconductor thin film have such a crystalline phase that a minimum crystal is 10nm or above in grain diameter and fine crystals below 10nm in grain diameter are not included.

公开(公告)号：JPH09307118A

公开(公告)日：1997-11-28

申请号：JP14840896

申请日：1996-05-17

Applicant: SONY CORP

Inventor： KUNII MASABUMI

IPC: H01L21/265 ,  H01L21/336 ,  H01L29/786

Abstract: PROBLEM TO BE SOLVED: To realize high precise and effective implantaion treatment of impurity ions to a semiconductor thin film. SOLUTION: Ions are implanted in a semiconductor thin film 2 with dosage less than 1×10 /cm , while a first ion beam is scanned by using an ion implantation equipment having a mass separater and a magnetic field deflector, the impurity concentration of a channel region Ch is adjusted, and Vth (threshold voltage) of a TFT (thin film transistor) is previously controlled. Ions are implanted in the semiconductor thin film 2 with dosage less than 1×10 /cm , while a second ion beam is scanned by using the same ion implantation equipment, and an LDD (low concentration impurity) region of the TFT is formed. Ions are implanted in the semiconductor thin film 2 with dosage greater than or equal to 1×10 /cm without scanning ion shower, by using an ion doping equipment which is not provided with a mass separater, and a source region S and a drain region D of the TFT are formed.

公开(公告)号：JPH09139505A

公开(公告)日：1997-05-27

申请号：JP31743095

申请日：1995-11-10

Applicant: SONY CORP

Inventor： KUNII MASABUMI

IPC: H01L27/08 ,  H01L29/786

Abstract: PROBLEM TO BE SOLVED: To improve operation characteristics and reliability of a bottom gate type thin film transistor which is formed by integration. SOLUTION: This device has a gate electrode 2 patterned on an insulating board 1. The gate electrode 2 is coated with a gate insulating film 3, on which a semiconductor thin film 4 is formed, and the channel region and the source region/drain egion of a bottom gate type thin film transistor TFT is constituted. The semiconductor thin film 4 is coated with an interlayer insulating film 5 above which a signal electrode 11 and a picture element electrode 12 are formed. As to the interlayer insulating film 5, at least the part which overlaps with the channel region has multilayered structure containing an NSG (SiO2 containing phosphorus) layer 6 which is directly in contact with the semiconductor thin film 4 and a PSG (SiO2 containing phosphorus) layer 7 which is formed on the layer 6. According to circumustances, an SiO2 layer may be used instead of the NSG layer 6, and an SiNx layer may be used instead of the PSG layer 7.