Semiconductor device and electronic equipment using it
    41.
    发明专利
    Semiconductor device and electronic equipment using it 审中-公开
    半导体器件和使用它的电子设备

    公开(公告)号:JP2006128314A

    公开(公告)日:2006-05-18

    申请号:JP2004312872

    申请日:2004-10-27

    Inventor: SATO SHUZO

    Abstract: PROBLEM TO BE SOLVED: To enhance the operational speed of a semiconductor device by reducing a clock skew easily and by raising the frequency of a clock signal without causing the increase in power consumption. SOLUTION: Two or more functional blocks are formed on an SOI wafer 101. Two or more functional blocks have a photodiode (PD) 102, respectively. All of the two or more functional blocks are covered with a light guiding plate 107. From a light signal generator 108, the light signal is generated corresponding to a clock signal. This light signal enters into the light guiding plate 107. This light signal enters into the PD 102 of the two or more functional blocks via the light guiding plate 107. A light signal is changed into an electrical signal by the PD 102 so as to acquire a clock signal in the two or more functional blocks, respectively. Only the light signal of a predetermined wave length can be entered selectively into the PD 102 of each functional block by arranging a wavelength demultiplexing filter 105 corresponding to the PD 102. COPYRIGHT: (C)2006,JPO&NCIPI

    Abstract translation: 要解决的问题:通过容易地减小时钟偏移并且通过提高时钟信号的频率而不引起功耗的增加来提高半导体器件的操作速度。 解决方案:在SOI晶片101上形成两个或更多个功能块。两个或多个功能块分别具有光电二极管(PD)102。 所有两个或更多个功能块都被导光板107覆盖。从光信号发生器108,产生对应于时钟信号的光信号。 该光信号进入导光板107.该光信号经由导光板107进入两个以上的功能块的PD102.光信号由PD102变成电信号,以获得 分别在两个或更多个功能块中的时钟信号。 可以通过布置对应于PD 102的波长解复用滤波器105,将预定波长的光信号选择性地输入到每个功能块的PD 102中。(C)2006,JPO&NCIPI

    Clock signal supplying device, semiconductor device using same, and electronic appliance
    42.
    发明专利
    Clock signal supplying device, semiconductor device using same, and electronic appliance 审中-公开
    时钟信号供给装置,使用其的半导体装置和电子装置

    公开(公告)号:JP2006126369A

    公开(公告)日:2006-05-18

    申请号:JP2004312871

    申请日:2004-10-27

    Inventor: SATO SHUZO

    Abstract: PROBLEM TO BE SOLVED: To supply completely synchronized clock signals to a plurality of points. SOLUTION: A light signal in a sinusoidal waveform having a frequency corresponding to a clock signal is supplied from a light signal generating unit 106 to one end of the core 104 of an optical waveguide. The core 104 passes a point of each functional block fabricated on a SOI wafer 101. A mirror 107 is disposed on the other end of the core 104. A traveling wave component and a reflected wave component are present in the core 104 to produce a stationary wave in the core 104. At each position corresponding to an amplitude peak of the stationary wave, the level of the light signal synchronously changes with others in a sine waveform having a frequency corresponding to the clock signal. A PD (photodiode) 102 of the respective functional block is formed at the position corresponding to the amplitude peak of the stationary wave. Thus, a completely synchronized clock signal can be obtained through the PD 102 in each functional block. COPYRIGHT: (C)2006,JPO&NCIPI

    Abstract translation: 要解决的问题:向多个点提供完全同步的时钟信号。 解决方案:具有对应于时钟信号的频率的正弦波形中的光信号从光信号产生单元106提供给光波导的核心104的一端。 核心104通过制造在SOI晶片101上的每个功能块的点。反射镜107设置在芯104的另一端。行进波分量和反射波分量存在于芯104中以产生静止 在对应于静止波的幅度峰值的每个位置处,光信号的电平以具有对应于时钟信号的频率的正弦波形与其他信号同步地改变。 相应功能块的PD(光电二极管)102形成在对应于静止波的幅度峰值的位置处。 因此,可以通过每个功能块中的PD 102获得完全同步的时钟信号。 版权所有(C)2006,JPO&NCIPI

    Optical waveguide device, fabrication method thereof and optical information processing apparatus
    43.
    发明专利
    Optical waveguide device, fabrication method thereof and optical information processing apparatus 审中-公开
    光波器件及其制造方法及光信息处理装置

    公开(公告)号:JP2006053471A

    公开(公告)日:2006-02-23

    申请号:JP2004236534

    申请日:2004-08-16

    Abstract: PROBLEM TO BE SOLVED: To provide an optical waveguide device having little loss of optical coupling, its fabrication method and an optical information processing apparatus. SOLUTION: In the optical waveguide device 1, a first semiconductor layer 2, an insulation layer 3 and a second semiconductor layer 4 are laminated in order and an optical waveguide layer 5 is formed on the first semiconductor layer 2. Therein, at least the thickness of the optical waveguide layer 5 on the light incident side edge part 6 is larger than that on the light emission side edge part 7. The optical information processing apparatus 8 comprises the optical waveguide device 1, a light incident means 9 which makes light incident to the optical waveguide layer 5 of the optical waveguide device 1 and a light receiving means 10 which receives emission light from the optical waveguide layer 5. In the fabrication method of the optical waveguide device 1, the optical waveguide layer 5 having at least the thickness of the optical waveguide layer 5 on the light incident side edge part 6 larger than that on the light emission side edge part 7 is formed through a process of introducing an impurity element such as germanium to the first semiconductor layer 2. COPYRIGHT: (C)2006,JPO&NCIPI

    Abstract translation: 要解决的问题:提供一种光耦合损失小的光波导装置及其制造方法和光信息处理装置。 解决方案:在光波导器件1中,依次层叠第一半导体层2,绝缘层3和第二半导体层4,并且在第一半导体层2上形成光波导层5.其中, 光入射侧边缘部6上的光波导层5的厚度最好比发光侧边缘部7的厚度大。光信息处理装置8包括光波导装置1,光入射装置9, 入射到光波导装置1的光波导层5的光和接收来自光波导层5的发射光的光接收装置10.在光波导装置1的制造方法中,光波导层5至少具有 光入射侧边缘部分6上的光波导层5的厚度大于发光侧边缘部分7上的厚度,是通过引入 n杂质元素如锗到第一半导体层2.版权所有(C)2006,JPO&NCIPI

    Optical waveguide device
    44.
    发明专利
    Optical waveguide device 有权
    光波器件

    公开(公告)号:JP2006047894A

    公开(公告)日:2006-02-16

    申请号:JP2004231945

    申请日:2004-08-09

    Abstract: PROBLEM TO BE SOLVED: To provide an optical waveguide device that can perform photodetection while efficiently propagating light inside an optical waveguide and that can be easily manufactured. SOLUTION: The optical waveguide device 23a is provided with an optical waveguide 21a such as an SiO 2 film for guiding light from a light incident section to a light emitting section, a light receiving part 2 such as a photo diode installed in contact with the outer face of this optical waveguide 21a, and a light reflection part 5 with a 45° mirror surface installed inside the optical waveguide 21a. A signal light 11, for which a vertical incident light beam 11 is guided after being reflected by a mirror 9, is converted 90° in the optical path by the light reflection part 5 and made incident to the light receiving part 2 for monitoring, while the remaining signal light is emitted from the optical waveguide 21a. COPYRIGHT: (C)2006,JPO&NCIPI

    Abstract translation: 要解决的问题:提供一种能够在有效地传播光波导内的光并且可以容易地制造的同时进行光检测的光波导装置。 解决方案:光波导器件23a设置有用于将来自光入射部分的光引导到发光部分的诸如SiO 2 膜的光波导21a,光接收部分2 作为与该光波导21a的外表面接触的光电二极管,以及安装在光波导21a内的具有45°镜面的光反射部5。 垂直入射光束11被反射镜9反射后被引导的信号灯11由光反射部5在光路中被转换成90°,并入射到受光部2进行监视,同时 剩余的信号光从光波导21a发射。 版权所有(C)2006,JPO&NCIPI

    Electrolytic polishing pad
    45.
    发明专利

    公开(公告)号:JP2004237381A

    公开(公告)日:2004-08-26

    申请号:JP2003027724

    申请日:2003-02-05

    Abstract: PROBLEM TO BE SOLVED: To provide an electrolytic polishing pad which enables positive and good polishing even in the case of combination of CMP and electrolytic polishing.
    SOLUTION: The electrolytic polishing pad 3 has a polishing surface on which a workpiece 1 is pressed and slid, and an electrode surface located on an electrode side opposite to the polishing surface, and carries out electrolytic polishing in an electrolytic solution 5 while the workpiece 1 is kept to be pressed and slid on the polishing surface. Herein the polishing surface is formed of a polyvinyl acetal material having continuous pores penetrating through the polishing surface and the electrode surface. Then a mean pore size of the continuous pores is set to a range of 50 to 150 μm, and a ratio of the pores is set to 80 % or more by volume.
    COPYRIGHT: (C)2004,JPO&NCIPI

    Process and system for fabricating semiconductor device

    公开(公告)号:JP2004200191A

    公开(公告)日:2004-07-15

    申请号:JP2002363260

    申请日:2002-12-16

    Abstract: PROBLEM TO BE SOLVED: To provide a process for forming a catalyst metallization layer by substitution plating without causing any pit in the copper grain boundary and without enlarging its pit when a barrier film for preventing the spread of copper is formed on the copper surface.
    SOLUTION: The process for fabricating a semiconductor device comprises a step for forming a barrier film 32 selectively on a second interconnect line 25 by electroless plating utilizing a catalyst metallization layer 31 after it is formed only on the second interconnect line 25 formed of copper or a copper alloy on a substrate 11 by substitution plating wherein substitution plating is carried out using a plating solution from which dissolved oxygen is removed, preferably a neutral (pH=7) plating solution or a basic (7

    Polishing method, polisher, and manufacturing method of semiconductor device

    公开(公告)号:JP2004172338A

    公开(公告)日:2004-06-17

    申请号:JP2002336105

    申请日:2002-11-20

    Abstract: PROBLEM TO BE SOLVED: To provide a polishing method for realizing formation of groove wires of a semiconductor device with high reliability by suppressing aggregation of polishing abrasive grains, and preventing production of defects such as scratch in the case of applying chemical mechanical polishing to a body to be polished made of copper or a copper alloy. SOLUTION: The polishing method polishes the surface of the body 11 to be polished made of copper or a copper alloy. The polishing method employs chemical mechanical polishing slurry wherein grains positively charged in an acidic solution 25 are used for the polishing abrasive grains 21, the body 11 to be polished is used for an anode, and the surface is polished in a state of giving a positive potential to the surface of the body 11 to be polished. Or the polishing method employs chemical mechanical polishing slurry wherein grains negatively charged in an alkaline solution 25 are used for the polishing abrasive grains 21, the body 11 to be polished is used for a cathode, and the surface is polished in a state of giving a negative potential to the surface of the body 11 to be polished. COPYRIGHT: (C)2004,JPO

    Semiconductor device and manufacturing method therefor

    公开(公告)号:JP2004152956A

    公开(公告)日:2004-05-27

    申请号:JP2002315763

    申请日:2002-10-30

    Abstract: PROBLEM TO BE SOLVED: To improve precision of a subsequent lithography process and to form highly reliable multilayer wiring by uniforming film thickness of barrier films formed on wiring and making a surface step by the barrier films to be minimum.
    SOLUTION: In a semiconductor substrate, wiring 13 is formed on an insulating film 12 formed on a substrate 11 by using copper or copper alloy, and the barrier films 14 are formed by selectively performing non-electrolytic plating on a catalyst metal layer formed on wiring 13 by substitution plating. The device is provided with dummy patterns 21 which are arranged between wirings 13 and 13 so as to uniform wiring density and use copper or copper alloy, and the barrier films 14 obtained by performing non-electrolytic plating on the catalyst metal layer formed on the dummy patterns 21 by substitution plating.
    COPYRIGHT: (C)2004,JPO

    SEMICONDUCTOR DEVICE AND ELECTRONIC COMPONENT MOUNTING BASE BOARD

    公开(公告)号:JP2003197808A

    公开(公告)日:2003-07-11

    申请号:JP2001393669

    申请日:2001-12-26

    Applicant: SONY CORP

    Abstract: PROBLEM TO BE SOLVED: To contrive the speed-up of a process by utilizing both of electricity and light as signal transmission means between electronic circuit elements. SOLUTION: The semiconductor device 1 is provided with an electronic circuit element 11 formed on a semiconductor base board 10, a light emitting device 12 as well as a photo detector 13, which are formed on the semiconductor base board 10, and a waveguide passage 14 formed on the semiconductor base board 10. Light, emitted from the light emitting device 12 based on an electric signal produced in the electronic circuit element 11, is transmitted to the photo detector 13 through the waveguide passage 14 to convert the light, received by the photo detector 13, into an electric signal. COPYRIGHT: (C)2003,JPO

    POLISHING METHOD AND APPARATUS
    50.
    发明专利

    公开(公告)号:JP2002110592A

    公开(公告)日:2002-04-12

    申请号:JP2000294974

    申请日:2000-09-27

    Applicant: SONY CORP

    Abstract: PROBLEM TO BE SOLVED: To provide a polishing apparatus and method, which can easily flatten a rough surface of a film to be polished and can efficiently polish the film into a film having a flattened surface, while suppressing a damage to such a layer below the polished film as an interlayer insulating film. SOLUTION: At the time of polishing an object W having a film to be polished such as a wiring layer formed as embedded into a wiring groove made in an insulating film of a substrate, a processing solution EL is made to flow along at least a surfaced of the film to be polished nearly parallelly thereto (F) to polish and remove preferentially rough projections on the polishing film under influences of shearing stress of the processing solution and to flatten the polishing surface of the film. A cathode electrode member E is positioned as opposed to the polishing surface, the electrolyte EL containing a chelating agent between the polishing surface and the member E while a voltage is applied to the polishing film and the member E is made to flow in a manner mentioned above ( F) to polish and remove preferentially projections on the polishing film under influences of shearing stress of the electrolyte and to flatten the polishing surface of the film.

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