公开(公告)号：FR2839202A1

公开(公告)日：2003-10-31

申请号：FR0205286

申请日：2002-04-26

Applicant: ST MICROELECTRONICS SA

Inventor： MENUT OLIVIER ,  JAOUEN HERVE ,  BOUCHE GUILLAUME ,  SKOTNICKI THOMAS

IPC: H01L21/28 ,  H01L21/761 ,  H01L21/8234 ,  H01L27/088 ,  H01L21/762

Abstract: An assembly of MOS transistors with a minimal dimension of less than 0.1 mum comprises a silicon substrate (1) of which the upper surface is plane and with each active zone delimited by an insulating layer (25) deposited over the upper surface of the substrate. The active part (28) of the grid of each MOS transistor is formed with a conducting double layer, the lower layer having the same thickness as the insulating layer and the upper layer extending on the insulating layer to form a head of the grid (29). An Independent claim is also included for a method for the fabrication of this assembly of MOS transistors.

公开(公告)号：FR2828331A1

公开(公告)日：2003-02-07

申请号：FR0110270

申请日：2001-07-31

Applicant: ST MICROELECTRONICS SA

Inventor： MENUT OLIVIER ,  JAOUEN HERVE ,  BOUCHE GUILLAUME

IPC: H01L21/28 ,  H01L21/265 ,  H01L21/331 ,  H01L21/338 ,  H01L21/8222 ,  H01L21/8248 ,  H01L21/8249 ,  H01L27/06 ,  H01L29/417 ,  H01L29/423 ,  H01L29/49 ,  H01L29/732 ,  H01L29/812 ,  H01L21/31

Abstract: Method for forming a contact (27) between a semiconductor substrate (10) and a doped layer of polycrystalline silicon (20) deposited on the substrate with the interposition of an insulating layer (19) consists of implanting across layer (20), some elements to render the insulating layer permeable to the migration of doping agents from the polycrystalline silicon towards the substrate.