Abstract:
An energy harvesting circuit receives an input voltage from a transducer and uses a single inductor operating in a DC-DC converter charging mode to generate charging current at a first output coupled to an energy storage device where a supply voltage is stored. The energy harvesting circuit further receives the supply voltage from the energy storage device and uses the same single inductor operating in a DC-DC converter regulating mode to generate load current at a second output where a regulated load voltage is provided. The energy harvesting circuit switches between the charging mode and the regulating mode in accordance with a discontinuous mode (DCM) control process.
Abstract:
A modulated digital input signal is passed through a conditioning circuit to generate a first input signal. An error amplifier circuit receives the first input signal and a second input signal, and controls the operation of a MOS transistor to generate an output signal that is current modulated. The output signal is sensed to generate a feedback signal. A switching circuit selectively applies the feedback signal as the second input signal in response to a transition of the modulated digital input signal from a first logic state to a second logic state. The switching circuit alternatively selectively applies a fixed reference signal as the second input signal to the error amplifier in response to a transition of the modulated digital input signal from the second logic state to the first logic state.
Abstract:
A half bridge converter is controlled by a circuit including a differential circuit receiving a reference signal and a feedback signal which is a function of an output signal from the converter. The half bridge includes hand and low side switches. A comparator generates a PWM signal for controlling the converter as a function of the duty cycle of the PWM signal in response to a signal at an intermediate node between the hand and low side switches and an output of the differential circuit. A gain circuit block coupled between the intermediate node and the input of the comparator applies a ramp signal to the input of the comparator which is a function of the signal at the intermediate node. A variable gain is applied by the gain circuit block in order to keep a constant value for the duty cycle of said PWM signal irrespective of converter operation.
Abstract:
A time based boost DC-DC converter generates an output voltage using an inductor. A voltage error between the output voltage and a reference voltage is determined and processed in a) an integral control branch which converts the voltage error into an integral control current signal used to control a current controlled oscillator, and b) a proportional branch which converts the voltage error into a proportional control current signal used to control signal a delay line. Current flowing in the inductor is sensed, attenuated and used to apply adjustment to the integral and proportional control current signals. The output from the current controlled oscillator is passed through the delay line and phase detected in order to generate pulse width modulation (PWM) control signaling driving switch operation in the converter.
Abstract:
First and second circuit branches are coupled between an input node and ground. Each circuit branch includes a series coupling first-fourth transistors in a current flow path with an output node. A first capacitor is coupled between a first capacitor node and a second capacitor node intermediate the first transistor and the second transistor in the first circuit branch. A second capacitor is coupled between a third capacitor node and a fourth capacitor node intermediate the first transistor and the second transistor in the second circuit branch. An inter-branch circuit block between the first and second branches includes a first inter-branch transistor coupled between the first capacitor node in the first circuit branch and the fourth capacitor node in the second circuit branch and a second inter-branch transistor coupled between the third capacitor node in the second circuit branch and the second capacitor node in the first circuit branch.
Abstract:
First and second n-channel FETs are connected in series between first and second terminals with an intermediate switching node. First and second driver circuits drive gates of the first and second n-channel FETs, respectively, in response to drive signals. The first driver circuit does not implement slew-rate control. A first resistor and capacitor are connected in series between the output of the first driver circuit and an intermediate node. A first electronic switch is connected between the intermediate node and the first terminal. A second electronic switch is connected between the intermediate node and the gate terminal of the first n-channel FET. A second resistor and a third electronic switch are connected in series between the gate terminal of the first n-channel FET and the switching node. A control circuit generates the drive signals and a first, second and third control signal for the first, second and third electronic switch.
Abstract:
A control device for a switching power converter having an inductor element, a switch coupled to the inductor element, a storage element coupled to an output on which an output voltage is provided, and a diode element coupled to the storage element. The control device generates a command signal to control the switch and determine storage of energy in the inductor element in a first interval, and transfer of energy onto the storage element through the diode element in a second interval. A voltage shifter module generates a feedback voltage shifted relative to the output voltage. An amplification module has a first input receiving the feedback voltage, a second input receiving the reference voltage, and an output that supplies, as a function of the difference between the feedback and reference voltages, a control signal. A control unit receives the control signal and generates the command signal to control the switch.
Abstract:
An energy-scavenging interface includes first and second switches connected in series between an input and reference, and third and fourth switches connected in series between the input and an output. A control circuit closes the first and second switches and opens the third switch for a first time interval to store charge in a storage element. A scaled copy of a peak value of the charging current is obtained. The control circuit then opens the first switch and closes the third and fourth switches to generate an output signal as long as the value in current of the output signal is higher than the value of said scaled copy of the peak value.
Abstract:
A system for driving a MEMS array having a number of MEMS structures, each defining at least one row terminal and one column terminal, envisages: a number of row driving stages, each for supplying row-biasing signals to the row terminal of each MEMS structure associated to a respective row; a number of column driving stages, each for supplying column-biasing signals to the column terminal of each MEMS structure associated to a respective column; and a control unit, for supplying row-address signals to the row driving stages for generation of the row-biasing signals and for supplying column-address signals to the column driving stages for generation of the column-biasing signals. The control unit further supplies row-deactivation and/or column-deactivation signals to one or more of the row and column driving stages, for causing deactivation of one or more rows and/or columns of the MEMS array.
Abstract:
An energy-scavenging interface receives an input signal from a transducer and supplies an output signal to a load. A switch is connected between the transducer and a reference node, and a diode is connected between the transducer and the load. A control circuit closes the switch for a time interval to permit energy storage in the transducer. A scale copy of a peak value of stored electric current is obtained. The switch is opened when the time interval elapses and the stored energy exceeds a threshold. The stored energy is then released to supply the load through the diode. The switch remains open as long as the value of current in the output signal exceeds the value of the scaled copy of the peak value.