公开(公告)号：JPH0816321A

公开(公告)日：1996-01-19

申请号：JP14825594

申请日：1994-06-29

Applicant: IBM

Inventor： ASANO HIDEO ,  MURAKAMI MASAYUKI

IPC: G06F13/10 ,  G06F3/06

Abstract: PURPOSE: To control an interruption request asserted to a host on pre-reading, post-reading and both reading. CONSTITUTION: The resetting state of a flip flop 72 is maintained and IRQ is prevented from being asserted by a host until the count value of a counter 80 becomes equal to the content of delay register 82. When the read signal of a state register is inputted to a flip flop 78 through an OR gate 94 until the count value of the counter 80 becomes equal to the content of the delay register 82, the flip flop 78 is set and Q output is maintained high as it is as post-reading and both reading. When the count value of the counter 80 becomes equal to the content of the delay register 82, the output of a comparator 84 becomes low, the flip flop 72 is set and IRQ is asserted by the host with CDR.

公开(公告)号：JPH06111588A

公开(公告)日：1994-04-22

申请号：JP25238692

申请日：1992-09-22

Applicant: IBM

Inventor： ASANO HIDEO

IPC: G11C17/00 ,  G06F3/06 ,  G11C16/02 ,  G11C16/34 ,  G11C16/06

Abstract: PURPOSE: To provide a batch erasing type nonvolatile memory in which writing is not biased to a part of the memory. CONSTITUTION: A processor includes plural accessable blocks to store a block ID expressing an address (RBA) designated by the processor at the time of writing, a rewriting code (RC) showing the number of writing times by the processor through the use of the same RBA and an erasing count (EC) showing the number of the erasing times of the pertinent block corresponding to each block. Writing is executed to a writable block of a smallest erasing count and when there is another block with the same block ID as the address designated by the processor at the time, its rewriting code is updated to make the rewriting code of the written block. In addition, the pertinent other block is erased and its erasing count is updated.

公开(公告)号：JPH05341918A

公开(公告)日：1993-12-24

申请号：JP11922692

申请日：1992-05-12

Applicant: IBM

Inventor： IWASA HIROYUKI ,  ASANO HIDEO ,  SHIMIZU YUTAKA

IPC: G06F3/06 ,  G06F11/16 ,  G06F11/20 ,  G06F12/16 ,  G11C29/00

Abstract: PURPOSE: To attain an information processing task with high reliability by executing a writing and reading operation only to a residual normal disk storage devices when any one of the disk storage devices breaks down. CONSTITUTION: A connector 101 is connected through a host SCSI bus 102 with a host SCSI adapter 103. The host SCSI adapter 103 is connected with a system bus in a host computer 104. The host SCSI adapter 103 has the best ID(identification code) = 7 in the host SCSI bus 102, and the connector 101 has ID=n ((n) is integers 0-6). Residual six SCSI, that is, SCSI devices having SCSI interfaces whose ID is 0-6 except (n) can be connected with the host SCSI bus 102. Then, when one of a pair of disk storage devices breaks down, the device which breaks down is separated, and a writing and reading operation is executed to the other normal disk storage.