公开(公告)号：DE10014387C1

公开(公告)日：2001-09-27

申请号：DE10014387

申请日：2000-03-23

Applicant: INFINEON TECHNOLOGIES AG

Inventor： ESTERL ROBERT ,  MANYOKI ZOLTAN ,  BOEHM THOMAS ,  ROEHR THOMAS

IPC: G11C11/22 ,  G11C7/00

Abstract: A main reference bit line is connected to a reference voltage via a charge switching element such as a p-channel transistor. At least one further reference bit line is connected to the main reference bit line via a compensation switching element for equalising the charge between the reference bit lines. The reference voltage is provided from a reference voltage source. The main reference bit line is connected to three further reference bit lines via three compensation switching elements for charge equalisation. The compensation switching elements may be connected in series. A method of generating a reference voltage on reference bit lines is also claimed.