公开(公告)号：AR048761A1

公开(公告)日：2006-05-24

申请号：ARP050101478

申请日：2005-04-15

Applicant: INTERDIGITAL TECH CORP

Inventor： KAZAKEVICH LEONID ,  HAQUE TANBIR ,  DEMIR ALPASLAN ,  TROIANO ROBERT

IPC: H03C1/62 ,  H03F1/02 ,  H03F1/06 ,  H03F1/14 ,  H03F1/30 ,  H03F3/24 ,  H04B1/04

Abstract: Un método y aparato que reducen la cantidad de rotacion de constelacion debida a variacion de fase de insercion de amplificador de potencia (PA) durante la activacion (es decir, encendido) de un transmisor. Esto se logra aplicando una rotacion de fase instantánea durante el encendido del transmisor en banda base digital para contrarrestar y minimizar variaciones de fase no convenientes.

公开(公告)号：DE60111885T2

公开(公告)日：2006-04-20

申请号：DE60111885

申请日：2001-03-27

Applicant: INTERDIGITAL TECH CORP

Inventor： KAZAKEVICH LEONID ,  OZLUTURK FATIH

IPC: H03G7/00 ,  H03G3/30

Abstract: A system for automatic gain control prevents input overload by precisely controlling the input level of a received, digitally modulated signal without using a variable gain amplifier. A limiting amplifier in conjunction with a logarithmic detector splits an input signal path in two, providing separate phase and amplitude information for downstream digital signal processing, where the separate phase and amplitude information is processed without variable gain artifacts. The separated phase information may further be divided into I and Q signals.

公开(公告)号：NO20060063L

公开(公告)日：2006-01-30

申请号：NO20060063

申请日：2006-01-05

Applicant: INTERDIGITAL TECH CORP

Inventor： KAZAKEVICH LEONID ,  HAQUE TANBIR ,  DEMIR ALPASLAN

IPC: H03M1/12 ,  H03G3/30 ,  H04B1/16 ,  H04L25/66

Abstract: A communication system including an amplifier, a receiver, an analog to digital converter (ADC) and an insertion phase variation compensation module. The amplifier receives a communication signal. If the amplifier is enabled, the amplifier amplifies the communication signal and outputs the amplified communication signal to the receiver. If the amplifier is disabled, the amplifier passes the communication signal to the receiver without amplifying it. The receiver outputs an analog complex signal to the ADC. The ADC outputs a digital complex signal to the insertion phase variation compensation module which counteracts the effects of a phase offset intermittently introduced into the communication signal when the amplifier is enabled or disabled.

公开(公告)号：NO20060063A

公开(公告)日：2006-01-30

申请号：NO20060063

申请日：2006-01-05

Applicant: INTERDIGITAL TECH CORP

Inventor： KAZAKEVICH LEONID ,  HAQUE TANBIR ,  DEMIR ALPASLAN

IPC: H03M1/12 ,  H03G3/30 ,  H04B1/16 ,  H04L25/66

CPC classification number: H03G3/3052

公开(公告)号：NO20060035A

公开(公告)日：2006-01-04

申请号：NO20060035

申请日：2006-01-04

Applicant: INTERDIGITAL TECH CORP

Inventor： KAZAKEVICH LEONID ,  HAQUE TANBIR ,  DEMIR ALPASLAN

IPC: H04L27/04 ,  H03C3/40 ,  H04B1/30 ,  H04L27/00

CPC classification number: H04B1/30 ,  H03C3/406 ,  H04L2027/0016 ,  H04L2027/0018

公开(公告)号：AR046981A1

公开(公告)日：2006-01-04

申请号：ARP040104841

申请日：2004-12-22

Applicant: INTERDIGITAL TECH CORP

Inventor： BULTAN AYKUT ,  HAIM JOHN W ,  KAZAKEVICH LEONID

IPC: H04B1/16 ,  H04B7/005 ,  H04B7/01 ,  H04B7/015 ,  H04W52/28

Abstract: Una unidad inalámbrica de transmision/recepcion (WTRU) utiliza un oscilador que provee exactitud para parámetros de comunicaciones sincronizadas en un modo activo, y opera a potencia reducida durante un modo de recepcion discontinua (DRX). Un reloj de tiempo real (RTC) es utilizado como estándar de frecuencia durante la operacion de potencia reducida, y se efectua un ajuste de frecuencia mientras que el RTC es utilizado como el estándar de frecuencia. Al efectuar el ajuste de frecuencia, el RTC es capaz de ser utilizado como el estándar de frecuencia para períodos de tiempo sustanciales, reduciendo así el consumo de potencia de la WTRU durante el modo DRX.

公开(公告)号：DK1143611T3

公开(公告)日：2005-11-14

申请号：DK01107436

申请日：2001-03-27

Applicant: INTERDIGITAL TECH CORP

Inventor： KAZAKEVICH LEONID ,  OZLUTURK FATIH

IPC: H03G3/30 ,  H03G7/00

Abstract: A system for automatic gain control prevents input overload by precisely controlling the input level of a received, digitally modulated signal without using a variable gain amplifier. A limiting amplifier in conjunction with a logarithmic detector splits an input signal path in two, providing separate phase and amplitude information for downstream digital signal processing, where the separate phase and amplitude information is processed without variable gain artifacts. The separated phase information may further be divided into I and Q signals.

公开(公告)号：NO20054871A

公开(公告)日：2005-11-11

申请号：NO20054871

申请日：2005-10-21

Applicant: INTERDIGITAL TECH CORP

Inventor： GRIECO DONALD M ,  KAZAKEVICH LEONID ,  YANG RUI

IPC: H04B17/40 ,  H03G3/30 ,  H04L5/14 ,  H04B7/005 ,  H04Q7/30

CPC classification number: H03G3/3052 ,  H03G3/3036 ,  H03G3/3042 ,  H03G3/3047 ,  H04L5/1484 ,  H04M3/40

公开(公告)号：CA2562111A1

公开(公告)日：2005-10-27

申请号：CA2562111

申请日：2005-03-18

Applicant: INTERDIGITAL TECH CORP

Inventor： HAQUE TANBIR ,  KAZAKEVICH LEONID ,  DEMIR ALPASLAN ,  KLAHN GERALD

IPC: H04B7/00 ,  H03C1/62 ,  H03F3/04 ,  H03F3/68 ,  H03G3/30 ,  H04B1/04 ,  H04B1/46 ,  H04B7/005 ,  H04B17/00

Abstract: A method and apparatus for dynamically adjusting the impedance between a transmitter's power amplifier (PA) and antenna to efficiently transfer power from the PA to the antenna. The impedance between the PA and the antenna is adjusted based on power level measurements and/or PA direct current (DC) consumption measurements, depending on whether the PA is a linear PA or a switch-mode PA. In another embodiment, a hybrid PA including a first stage linear PA and a second stage switch-mode PA is implemented in a transmitter. The hybrid PA selectively connects the output of the first stage linear PA t o one of the input of the second stage switch-mode PA and the output of the hybrid PA, depending on the output power level of the first stage linear PA, the output power level of the hybrid PA, or a requirement indicated by a transmit power control (TPC) command.

公开(公告)号：NO20054253A

公开(公告)日：2005-09-14

申请号：NO20054253

申请日：2005-09-14

Applicant: INTERDIGITAL TECH CORP

Inventor： REZNIK ALEXANDER ,  ZEIRA ARIELA ,  KAZAKEVICH LEONID ,  OZLUTURK FATIH M

IPC: G10L11/00 ,  H04B1/707

CPC classification number: H04B1/7103 ,  H04B1/71055 ,  H04B2001/71077 ,  H04B2201/70705

Abstract: A first detector receives a received signal and extracts the data signals from the received signal. A hard decision converter converts soft symbols outputted by the first detector into hard symbols. An interference canceller extracts the voice signals from the received signal. A second detector is connected to the output of the interference canceller, and extracts the individual voice signals. The second detector is a different detector type than the first detector.