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公开(公告)号：CA1184682A
公开(公告)日：1985-03-26
申请号：CA404674
申请日：1982-06-08
Applicant: SONY CORP
Inventor： SONEDA MITSUO , OHTSU TAKAJI , KUTARAGI KEN
Abstract: LIQUID CRYSTAL MATRIX DISPLAY DEVICE A liquid crystal matrix display device has a plurality of liquid crystal display elements arranged in an X-Y matrix pattern. Vertical transmitting lines are connected to all of the display elements of each column, and horizontal transmitting lines are connected to each of the display elements of each row. Each of the vertical lines is connected through an input switching element to an input circuit to receive a video input signal and a horizontal pulse generator provides sequential pulse signals to control terminals of the input switching elements. In order to compensate for crosstalk that occurs because of parasitic capacitance between the vertical transmitting lines and the liquid crystal display elements, auxiliary lines are provided for the columns of such display elements, and each has a predetermined compensating capacitance relative to its associated liquid crystal display elements. A compensating signal, which is an inverted version of the video signal, is applied in succession to the auxiliary lines to compensate for any crosstalk.
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公开(公告)号：GB2100952B
公开(公告)日：1984-11-21
申请号：GB8213083
申请日：1982-05-06
Applicant: SONY CORP
Inventor： NOGUCHI TAKASHI , SONEDA MITSUO , OHTSU TAKAJI
IPC: H04N5/14 , H03G1/00 , H04N5/243 , H04N5/335 , H04N5/341 , H04N5/357 , H04N5/372 , H04N5/374 , H04N5/378 , H04N5/197 , H03F3/04
Abstract: Solid-state image pickup apparatus, such as an MOS imager, has a two-dimensional array of picture element units each formed of a photo sensitive element and a gating element, and scanning circuits for supplying horizontal and vertical scanning pulses. The picture unit elements in turn discharge a signal charge onto vertical and horizontal transmitting lines in response to the vertical and horizontal scanning pulses. Then, a resulting signal current is used to develop an output video signal. In order to provide a strong output video signal with a good S/N ratio, a current mirror circuit, formed of an input transistor and an output transistor with first current-carrying electrodes joined together to a voltage reference point and with control electrodes joined together, amplifies the signal current. A second current-carrying electrode of the input transistor receives a constant current from a current source and also receives the signal current. The output transistor has a second current-carrying electrode connected to an output load. Another current source can be connected to the output transistor so that only AC current will flow to the output load. The output load can be a load capacitor associated with a pre-charging transistor, or can be a serial charge transfer device.
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公开(公告)号：FR2532777A1
公开(公告)日：1984-03-09
申请号：FR8314335
申请日：1983-09-08
Applicant: SONY CORP
Inventor： SONEDA MITSUO , MAEKAWA TOSHIZAKU , OTSU KOUJI
Abstract: A signal translating circuit is disclosed in which an input signal is supplied to a source follower transistor, a bootstrap capacitive component is presented between the gate and source of the source follower transistor, the signal from the source follower transistor is supplied through a first transmission gate to a next stage, and also led out to an output terminal. Further, the circuit formed of the source follower transistor and the first transmission gate is sequentially connected and the source follower transistor and the first transmission gate are alternately driven with different phases to each other whereby the input signal is sequentially transmitted at each stage. Furthermore, a second transmission gate is connected between the output terminal of the source follower transistor and the ground in which after the output signal at the output terminal rises up and falls down once, the second transmission gate is turned on by the signal relating to the output from the stages following the succeeding stage to thereby make the level of the signal when the output signal at the output terminal falls down stable. Thus, undesired potential fluctuation is not generated on the output line.
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公开(公告)号：CA1147817A
公开(公告)日：1983-06-07
申请号：CA365672
申请日：1980-11-27
Applicant: SONY CORP
Inventor： TSUCHIYA TAKAO , SONEDA MITSUO , NAKAMURA ISA
IPC: G11C27/04 , G11C19/18 , H01L21/339 , H01L29/762 , H03K3/36
Abstract: A bucket brigaded device is provided which includes a first and second clocking signal generators for generating first set and second set of plural clocking signals respectively, a plurality of successive capacitors for sequentially holding charge level representing an input signal, and a plurality of transistors for controlling the transfer of charge from one capacitor to another. Each of the transistors is connected between adjacent capacitors. The bucket brigaded device further comprises a first clocking signal driver for supplying one of the first set of plural clocking signals to the capacitor, and a second clocking signal driver for supplying one of the second set of plural clocking signals to the transitor.
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公开(公告)号：GB2103857A
公开(公告)日：1983-02-23
申请号：GB8216599
申请日：1982-06-08
Applicant: SONY CORP
Inventor： KUTARAGI KEN , OTSU TAKAJI , SONEDA MITSUO
Abstract: A liquid crystal matrix display device has a plurality of liquid crystal display elements arranged in an X-Y matrix pattern. Vertical transmitting lines are connected to all of the display elements of each column, and horizontal transmitting lines are connected to each of the display elements of each row. Each of the vertical lines is connected through an input switching element to an input circuit to receive a video input signal and a horizontal pulse generator provides sequential pulse signals to control terminals of the input switching elements. In order to compensate for crosstalk that occurs because of parasitic capacitance between the vertical transmitting lines and the liquid crystal display elements, auxiliary lines are provided for the columns of such display elements, and each has a predetermined compensating capacitance relative to its associated liquid crystal display elements. A compensating signal, which is an inverted version of the video signal, is applied in succession to the auxiliary lines to compensate for any crosstalk.
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Patent Agency Ranking
公开(公告)号：DE3217046A1
公开(公告)日：1983-01-20
申请号：DE3217046
申请日：1982-05-06
Applicant: SONY CORP
Inventor： SONEDA MITSUO , NOGUCHI TAKASHI , OHTSU TAKAJI
IPC: H04N5/14 , H03G1/00 , H04N5/243 , H04N5/335 , H04N5/341 , H04N5/357 , H04N5/372 , H04N5/374 , H04N5/378
Abstract: Solid-state image pickup apparatus, such as an MOS imager, has a two-dimensional array of picture element units each formed of a photo sensitive element and a gating element, and scanning circuits for supplying horizontal and vertical scanning pulses. The picture unit elements in turn discharge a signal charge onto vertical and horizontal transmitting lines in response to the vertical and horizontal scanning pulses. Then, a resulting signal current is used to develop an output video signal. In order to provide a strong output video signal with a good S/N ratio, a current mirror circuit, formed of an input transistor and an output transistor with first current-carrying electrodes joined together to a voltage reference point and with control electrodes joined together, amplifies the signal current. A second current-carrying electrode of the input transistor receives a constant current from a current source and also receives the signal current. The output transistor has a second current-carrying electrode connected to an output load. Another current source can be connected to the output transistor so that only AC current will flow to the output load. The output load can be a load capacitor associated with a pre-charging transistor, or can be a serial charge transfer device.
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公开(公告)号：DE3220958A1
公开(公告)日：1982-12-23
申请号：DE3220958
申请日：1982-06-03
Applicant: SONY CORP
Inventor： SONEDA MITSUO , OTSU TAKAJA
Abstract: A liquid crystal matrix display device has a plurality of display elements arranged in an X-Y matrix pattern. Vertical transmitting lines are connected to all of the display elements of each column, and horizontal transmitting lines are connected to each of the display elements of each row. Each of the vertical lines is connected through an input switching element to an input circuit to receive a video input signal and a horizontal pulse generator provides sequential pulse signals to control terminals of the input switching elements. In order to improve the resolution without sacrifice of contrast, the vertical transmitting lines are arranged into groups of a predetermined number of such lines, and the input switching elements associated with the lines of each such group have their control electrodes coupled together to a respective output of the horizontal scanning pulse generator. The input circuit includes time-demultiplexing circuitry, for example, formed of sample/hold circuits, to present respective sampled versions of the input signal, staggered with respect to one another, to input electrodes of respective ones of the input switching devices of each of the groups.
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公开(公告)号：CA1131779A
公开(公告)日：1982-09-14
申请号：CA341865
申请日：1979-12-13
Applicant: SONY CORP
Inventor： TSUCHIYA TAKAO , SONEDA MITSUO
Abstract: SO1253 A clocking signal drive circuit supplies at least one clocking signal in a charge transfer device which has a plurality of successive capacitive storage elements for sequentially holding a charge level representing a time sampled input signal, with each of the capacitive storage elements having a clocking electrode for receiving one of a plurality of clocking signals so that the charge level representing the time sampled input signal is transferred from one to another of the capacitive storage means in succession in response to the clocking signals. The clocking signal drive circuit includes a clocking signal generator having an output at which the generator provides a clocking control signal, and a pair of complementary transistors each having first, second, and control electrodes, with the control electrode of the complementary transistors being connected together and to the output of the clocking signal generator and the first electrodes of the complementary transistors being connected together and to the clocking electrode of at least one of the capacitive storage elements. In one embodiment of the invention the clocking signal drive circuit functions as an output device for detecting the charge level on at least one of the capacitive storage elements of the charge transfer device, and further includes a detector for determining the amount of current which flows from the clocking signal drive circuit to the clocking electrode or electrodes to which it is connected.
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公开(公告)号：CA1125392A
公开(公告)日：1982-06-08
申请号：CA344111
申请日：1980-01-21
Applicant: SONY CORP
Inventor： TSUCHIYA TAKAO , SONEDA MITSUO
Abstract: A non-recursive transversal filter circuit employs a charge transfer device in which certain of the capacitive storage elements are divided into first and second capacitive portions having predetermined capacitance relationships. The charge in the second capacitive storage elements is sensed at predetermined times to produce an output signal. The relative capacitances of the second capacitance portions provide weighting factors to the filter. Embodiments include bucket brigade devices with bipolar and FET transistors as well as charge coupled devices.
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公开(公告)号：FR2480530A1
公开(公告)日：1981-10-16
申请号：FR8107289
申请日：1981-04-10
Applicant: SONY CORP
Inventor： SONEDA MITSUO
Abstract: A filter circuit comprising a charge transfer device of the type which includes first and second sets of charge storage devices, such as capacitors, the first and second sets of charge storage devices being supplied with first and second clock signals, respectively, and further including first and second sets of switches which are actuated in response to the first and second clock signals, respectively, each switch being operable, when actuated, to transfer charge between a charge storage device in one set and a charge storage device in the other set, thereby transferring a charge through succeeding switches to be temporarily stored in succeeding charge storage devices. A semiconductor element, such as a transistor, is actuated in response either to the first or to the second clock signals for transferring the charge stored in a first predetermined charge storage device to a second predetermined charge storage device. An output circuit is coupled to a preselected charge storage device for deriving an output signal from the filter circuit.
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