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公开(公告)号：EP0103645A4
公开(公告)日：1986-09-22
申请号：EP83900804
申请日：1983-03-05
Applicant: SONY CORP
Inventor： SONEDA MITSUO , FUKUZAWA MANAMI , OHTSU TAKAJI
IPC: H03K19/094 , G11C19/00 , G11C19/28 , H03K5/02 , H03K5/135 , H03K5/153 , H03K5/26 , H03K19/096 , H03K5/01 , H03K5/15
CPC classification number: H03K19/096 , H03K5/135 , H03K5/153 , H03K5/26
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公开(公告)号：EP0105386A4
公开(公告)日：1984-09-14
申请号：EP83901229
申请日：1983-04-16
Applicant: SONY CORP
Inventor： SONEDA MITSUO , MAEKAWA TOSHIKAZU , OHTSU KOJI
IPC: H01L27/146 , H04N5/374 , H04N5/30
CPC classification number: H01L27/14643 , H04N5/374
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公开(公告)号：AT79690T
公开(公告)日：1992-09-15
申请号：AT87303533
申请日：1987-04-22
Applicant: SONY CORP
Inventor： SONEDA MITSUO
IPC: G11C11/419 , G11C7/06 , G11C11/409
Abstract: A sense amplifier (11) includes two cross-coupled field effect transistors (M1, M2) coupled by capacitors (C1, C2) to respective bit lines (BL2, BL1) from a memory cell. During a precharging operation, the capacitors (C1, C2) are charged to precharged voltages indicative of the threshold dispersion voltage between the two transistors (M1, M2). Thereafter, during a sensing operation, the precharged voltages are applied to the gates (G1, G2) of the transistors (M1, M2) to compensate for the threshold dispersion voltage.
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公开(公告)号：CA1262477A
公开(公告)日：1989-10-24
申请号：CA535376
申请日：1987-04-23
Applicant: SONY CORP
Inventor： SONEDA MITSUO
IPC: G11C11/419 , G11C7/06 , G11C11/409
Abstract: A sense amplifier includes two cross-coupled field effect transistors capacitively coupled to respective bit lines from a memory cell. During a precharging operation two capacitors are charged to precharged voltages indicative of the threshold dispersion voltage between the two transistors. Thereafter, during a sensing operation, the precharged voltages are applied to the gates of the transistors to compensate for the threshold dispersion voltage.
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公开(公告)号：CA1185005A
公开(公告)日：1985-04-02
申请号：CA402178
申请日：1982-05-03
Applicant: SONY CORP
Inventor： SONEDA MITSUO , NOGUCHI TAKASHI , OHTSU TAKAJI
IPC: H04N5/14 , H03G1/00 , H04N5/243 , H04N5/335 , H04N5/341 , H04N5/357 , H04N5/372 , H04N5/374 , H04N5/378 , H04N5/38
Abstract: Solid-state image pickup apparatus, such as an MOS imager, has a two-dimensional array of picture element units each formed of a photo sensitive element and a gating element, and scanning circuits for supplying horizontal and vertical scanning pulses. The picture unit elements in turn discharge a signal charge onto vertical and horizontal transmitting lines in response to the vertical and horizontal scanning pulses. Then, a resulting signal current is used to develop an output video signal. In order to provide a strong output video signal with a good S/N ratio, a current mirror circuit, formed of an input transistor and an output transistor with first current-carrying electrodes joined together to a voltage reference point and with control electrodes joined together, amplifies the signal current. A second current-carrying electrode of the input transistor receives a constant current from a current source and also receives the signal current. The output transistor has a second current-carrying electrode connected to an output load. Another current source can be connected to the output transistor so that only AC current will flow to the output load. The output load can be a load capacitor associated with a pre-charging transistor, or can be a serial charge transfer device.
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Patent Agency Ranking
公开(公告)号：CA1160694A
公开(公告)日：1984-01-17
申请号：CA375200
申请日：1981-04-10
Applicant: SONY CORP
Inventor： SONEDA MITSUO
Abstract: SO14 FILTER CIRCUIT HAVING A CHARGE TRANSFER DEVICE A filter circuit comprising a charge transfer device of the type which includes first and second sets of charge storage devices, such as capacitors, the first and second sets of charge storage devices being supplied with first and second clock signals, respectively, and further including first and second sets of switches which are actuated in response to the first and second clock signals, respectively, each switch being operable, when actuated, to transfer charge between a charge storage device in one set and a charge storage device in the other set, thereby transferring a charge through succeeding switches to be temporarily stored in succeeding charge storage devices. A semiconductor element, such as a transistor, is actuated in response either to the first or to the second clock signals for transferring the charge stored in a first predetermined charge storage device to a second predetermined charge storage device. An output circuit is coupled to a preselected charge storage device for deriving an output signal from the filter circuit.
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公开(公告)号：AU533397B2
公开(公告)日：1983-11-24
申请号：AU6478280
申请日：1980-11-27
Applicant: SONY CORP
Inventor： TSUCHIYA TAKAO , SONEDA MITSUO , NAKAMURA ISA
IPC: G11C27/04 , G11C19/18 , H01L21/339 , H01L29/762 , H03H11/26 , H03H15/00 , H03K5/135 , H03K5/14 , H03K5/159
Abstract: A bucket brigaded device is provided which includes first and second clocking signal generators for generating a first set and a second set of clocking signals respectively, a plurality of successive capacitors for sequentially holding charge level representing an input signal, and a plurality of transistors for controlling the transfer of charge levels from one capacitor to another. Each of the transistors is connected between adjacent capacitors. The bucket brigaded device further comprises a first clocking signal driver for supplying one of the first set of clocking signals to each capacitor, and a second clocking signal driver for supplying one of the second set of clocking signals to each transistor.
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公开(公告)号：GB2102176A
公开(公告)日：1983-01-26
申请号：GB8216317
申请日：1982-06-04
Applicant: SONY CORP
Inventor： SONEDA MITSUO , OTSU TAKAJI
Abstract: A liquid crystal matrix display device has a plurality of display elements arranged in an X-Y matrix pattern. Vertical transmitting lines are connected to all of the display elements of each column, and horizontal transmitting lines are connected to each of the display elements of each row. Each of the vertical lines is connected through an input switching element to an input circuit to receive a video input signal and a horizontal pulse generator provides sequential pulse signals to control terminals of the input switching elements. In order to improve the resolution without sacrifice of contrast, the vertical transmitting lines are arranged into groups of a predetermined number of such lines, and the input switching elements associated with the lines of each such group have their control electrodes coupled together to a respective output of the horizontal scanning pulse generator. The input circuit includes time-demultiplexing circuitry, for example, formed of sample/hold circuits, to present respective sampled versions of the input signal, staggered with respect to one another, to input electrodes of respective ones of the input switching devices of each of the groups.
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公开(公告)号：GB2100952A
公开(公告)日：1983-01-06
申请号：GB8213083
申请日：1982-05-06
Applicant: SONY CORP
Inventor： NOGUCHI TAKASHI , SONEDA MITSUO , OHTSU TAKAJI
IPC: H04N5/14 , H03G1/00 , H04N5/243 , H04N5/335 , H04N5/341 , H04N5/357 , H04N5/372 , H04N5/374 , H04N5/378 , H04N5/197 , H03F3/04
Abstract: Solid-state image pickup apparatus, such as an MOS imager, has a two-dimensional array of picture element units each formed of a photo sensitive element and a gating element, and scanning circuits for supplying horizontal and vertical scanning pulses. The picture unit elements in turn discharge a signal charge onto vertical and horizontal transmitting lines in response to the vertical and horizontal scanning pulses. Then, a resulting signal current is used to develop an output video signal. In order to provide a strong output video signal with a good S/N ratio, a current mirror circuit, formed of an input transistor and an output transistor with first current-carrying electrodes joined together to a voltage reference point and with control electrodes joined together, amplifies the signal current. A second current-carrying electrode of the input transistor receives a constant current from a current source and also receives the signal current. The output transistor has a second current-carrying electrode connected to an output load. Another current source can be connected to the output transistor so that only AC current will flow to the output load. The output load can be a load capacitor associated with a pre-charging transistor, or can be a serial charge transfer device.
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公开(公告)号：FR2507803A1
公开(公告)日：1982-12-17
申请号：FR8210233
申请日：1982-06-11
Applicant: SONY CORP
Inventor： SONEDA MITSUO , OTSU TAKAJI , KUTARAGI KEN
Abstract: A liquid crystal matrix display device has a plurality of liquid crystal display elements arranged in an X-Y matrix pattern. Vertical transmitting lines are connected to all of the display elements of each column, and horizontal transmitting lines are connected to each of the display elements of each row. Each of the vertical lines is connected through an input switching element to an input circuit to receive a video input signal and a horizontal pulse generator provides sequential pulse signals to control terminals of the input switching elements. In order to compensate for crosstalk that occurs because of parasitic capacitance between the vertical transmitting lines and the liquid crystal display elements, auxiliary lines are provided for the columns of such display elements, and each has a predetermined compensating capacitance relative to its associated liquid crystal display elements. A compensating signal, which is an inverted version of the video signal, is applied in succession to the auxiliary lines to compensate for any crosstalk.
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