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公开(公告)号：US20170309776A1
公开(公告)日：2017-10-26
申请号：US15645363
申请日：2017-07-10
Applicant: Sensor Electronic Technology, Inc.
Inventor： Michael Shur , Remigijus Gaska , Jinwei Yang , Alexander Dobrinsky
CPC classification number: H01L33/06 , H01L33/025 , H01L33/04 , H01L33/10 , H01L33/14 , H01L33/32 , H01L33/325
Abstract: A carbon doped short period superlattice is provided. A heterostructure includes a short period superlattice comprising a plurality of quantum wells alternating with a plurality of barriers. One or more of the quantum wells and/or the barriers includes a carbon doped layer (e.g., a non-percolated or percolated carbon atomic plane).
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公开(公告)号：US09748440B2
公开(公告)日：2017-08-29
申请号：US15225382
申请日：2016-08-01
Applicant: Sensor Electronic Technology, Inc.
Inventor： Michael Shur , Rakesh Jain , Maxim S. Shatalov , Alexander Dobrinsky , Jinwei Yang , Remigijus Gaska , Mikhail Gaevski
IPC: H01L33/06 , H01L33/00 , H01L33/18 , H01L33/38 , H01S5/022 , H01L33/30 , H01S5/343 , H01S5/32 , H01S5/34
CPC classification number: H01L33/06 , H01L33/007 , H01L33/18 , H01L33/30 , H01L33/382 , H01L2224/14 , H01S5/0224 , H01S5/3209 , H01S5/3413 , H01S5/34333
Abstract: A device comprising a semiconductor layer including a plurality of compositional inhomogeneous regions is provided. The difference between an average band gap for the plurality of compositional inhomogeneous regions and an average band gap for a remaining portion of the semiconductor layer can be at least thermal energy. Additionally, a characteristic size of the plurality of compositional inhomogeneous regions can be smaller than an inverse of a dislocation density for the semiconductor layer.
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公开(公告)号：US20170229612A1
公开(公告)日：2017-08-10
申请号：US15495192
申请日：2017-04-24
Applicant: Sensor Electronic Technology, Inc.
Inventor： Maxim S. Shatalov , Rakesh Jain , Jinwei Yang , Michael Shur , Remigijus Gaska
CPC classification number: H01L33/22 , G06F17/5068 , G06F2217/12 , H01L21/0242 , H01L21/0243 , H01L21/02458 , H01L21/0254 , H01L21/02617 , H01L21/02639 , H01L21/0265 , H01L33/007 , H01L33/06 , H01L33/10 , H01L33/12 , H01L33/24 , H01L33/32 , H01L2224/16225 , Y02P90/265
Abstract: A patterned surface for improving the growth of semiconductor layers, such as group III nitride-based semiconductor layers, is provided. The patterned surface can include a set of substantially flat top surfaces and a plurality of openings. Each substantially flat top surface can have a root mean square roughness less than approximately 0.5 nanometers, and the openings can have a characteristic size between approximately 0.1 micron and five microns. One or more of the substantially flat top surfaces can be patterned based on target radiation.
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公开(公告)号：US09722139B2
公开(公告)日：2017-08-01
申请号：US13863423
申请日：2013-04-16
Applicant: Sensor Electronic Technology, Inc.
Inventor： Wenhong Sun , Alexander Dobrinsky , Maxim S Shatalov , Jinwei Yang , Michael Shur , Remigijus Gaska
CPC classification number: H01L33/06 , H01L21/02389 , H01L21/02505 , H01L21/02507 , H01L21/02513 , H01L33/0066 , H01L33/0075 , H01L33/04
Abstract: A light emitting heterostructure including one or more fine structure regions is provided. The light emitting heterostructure can include a plurality of barriers alternating with a plurality of quantum wells. One or more of the barriers and/or quantum wells includes a fine structure region. The fine structure region includes a plurality of subscale features arranged in at least one of: a growth or a lateral direction.
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公开(公告)号：US09691939B2
公开(公告)日：2017-06-27
申请号：US14822508
申请日：2015-08-10
Applicant: Sensor Electronic Technology, Inc.
Inventor： Rakesh Jain , Wenhong Sun , Jinwei Yang , Maxim S. Shatalov , Alexander Dobrinsky , Michael Shur , Remigijus Gaska
CPC classification number: H01L33/12 , C30B25/04 , C30B25/183 , C30B29/406 , H01L21/0242 , H01L21/0243 , H01L21/02458 , H01L21/0254 , H01L21/02639 , H01L21/0265 , H01L29/2003 , H01L29/205 , H01L29/518 , H01L29/7786 , H01L29/7787 , H01L33/06 , H01L33/10 , H01L33/145 , H01L33/22 , H01L33/24 , H01L33/32 , H01L33/405 , H01L2933/0091
Abstract: A method of fabricating a device using a layer with a patterned surface for improving the growth of semiconductor layers, such as group III nitride-based semiconductor layers with a high concentration of aluminum, is provided. The patterned surface can include a substantially flat top surface and a plurality of stress reducing regions, such as openings. The substantially flat top surface can have a root mean square roughness less than approximately 0.5 nanometers, and the stress reducing regions can have a characteristic size between approximately 0.1 microns and approximately five microns and a depth of at least 0.2 microns. A layer of group-III nitride material can be grown on the first layer and have a thickness at least twice the characteristic size of the stress reducing regions. A device including one or more of these features also is provided.
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Patent Agency Ranking
公开(公告)号：US09653313B2
公开(公告)日：2017-05-16
申请号：US15144064
申请日：2016-05-02
Applicant: Sensor Electronic Technology, Inc.
Inventor： Maxim S. Shatalov , Jinwei Yang , Wenhong Sun , Rakesh Jain , Michael Shur , Remigijus Gaska
IPC: H01L29/15 , H01L31/0256 , H01L21/308 , H01L29/66 , H01L21/02 , H01L29/20 , H01L33/00 , H01L33/12
CPC classification number: H01L21/308 , H01L21/0237 , H01L21/02458 , H01L21/02505 , H01L21/0254 , H01L21/02639 , H01L21/0265 , H01L29/158 , H01L29/2003 , H01L29/66075 , H01L33/007 , H01L33/12
Abstract: A semiconductor structure, such as a group III nitride-based semiconductor structure is provided. The semiconductor structure includes a cavity containing semiconductor layer. The cavity containing semiconductor layer can have a thickness greater than two monolayers and a multiple cavities. The cavities can have a characteristic size of at least one nanometer and a characteristic separation of at least five nanometers.
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公开(公告)号：US20160343904A1
公开(公告)日：2016-11-24
申请号：US15230933
申请日：2016-08-08
Applicant: Sensor Electronic Technology, Inc.
Inventor： Maxim S. Shatalov , Jinwei Yang , Alexander Dobrinsky , Michael Shur , Remigijus Gaska
CPC classification number: H01L33/12 , G06F17/505 , H01L33/0025 , H01L33/007 , H01L33/0075 , H01L33/06 , H01L33/145 , H01L33/24 , H01L33/32 , H01L33/38 , H01L33/46
Abstract: A semiconductor structure comprising a buffer structure and a set of semiconductor layers formed adjacent to a first side of the buffer structure is provided. The buffer structure can have an effective lattice constant and a thickness such that an overall stress in the set of semiconductor layers at room temperature is compressive and is in a range between approximately 0.1 GPa and 2.0 GPa. The buffer structure can be grown using a set of growth parameters selected to achieve the target effective lattice constant a, control stresses present during growth of the buffer structure, and/or control stresses present after the semiconductor structure has cooled.
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公开(公告)号：US20160247885A1
公开(公告)日：2016-08-25
申请号：US15144064
申请日：2016-05-02
Applicant: Sensor Electronic Technology, Inc.
Inventor： Maxim S. Shatalov , Jinwei Yang , Wenhong Sun , Rakesh Jain , Michael Shur , Remigijus Gaska
IPC: H01L29/201 , H01L21/308 , H01L29/78 , H01L29/15 , H01L29/66
CPC classification number: H01L21/308 , H01L21/0237 , H01L21/02458 , H01L21/02505 , H01L21/0254 , H01L21/02639 , H01L21/0265 , H01L29/158 , H01L29/2003 , H01L29/66075 , H01L33/007 , H01L33/12
Abstract: A semiconductor structure, such as a group III nitride-based semiconductor structure is provided. The semiconductor structure includes a cavity containing semiconductor layer. The cavity containing semiconductor layer can have a thickness greater than two monolayers and a multiple cavities. The cavities can have a characteristic size of at least one nanometer and a characteristic separation of at least five nanometers.
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公开(公告)号：US20160197233A1
公开(公告)日：2016-07-07
申请号：US15069249
申请日：2016-03-14
Applicant: Sensor Electronic Technology, Inc.
Inventor： Michael Shur , Remigijus Gaska , Jinwei Yang , Alexander Dobrinsky
CPC classification number: H01L33/06 , H01L33/025 , H01L33/04 , H01L33/10 , H01L33/14 , H01L33/32 , H01L33/325
Abstract: A carbon doped short period superlattice is provided. A heterostructure includes a short period superlattice comprising a plurality of quantum wells alternating with a plurality of barriers. One or more of the quantum wells and/or the barriers includes a carbon doped layer (e.g., a non-percolated or percolated carbon atomic plane).
Abstract translation: 提供了碳掺杂短周期超晶格。 异质结构包括短周期超晶格，其包括与多个势垒交替的多个量子阱。 量子阱和/或势垒中的一个或多个包括碳掺杂层（例如，非过滤或质子交换的碳原子平面）。
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公开(公告)号：US20160197228A1
公开(公告)日：2016-07-07
申请号：US15069178
申请日：2016-03-14
Applicant: Sensor Electronic Technology, Inc.
Inventor： Maxim S. Shatalov , Alexander Dobrinsky , Alexander Lunev , Rakesh Jain , Jinwei Yang , Michael Shur , Remigijus Gaska
CPC classification number: H01L33/0025 , H01L33/0075 , H01L33/10 , H01L33/32 , H01L33/46 , H01S5/0224
Abstract: A semiconductor layer including a plurality of inhomogeneous regions is provided. Each inhomogeneous region has one or more attributes that differ from a material forming the semiconductor layer. The inhomogeneous regions can include one or more regions configured based on radiation having a target wavelength. These regions can include transparent and/or reflective regions. The inhomogeneous regions also can include one or more regions having a higher conductivity than a conductivity of the radiation-based regions, e.g., at least ten percent higher.
Abstract translation: 提供包括多个不均匀区域的半导体层。 每个不均匀区域具有与形成半导体层的材料不同的一个或多个属性。 不均匀区域可以包括基于具有目标波长的辐射配置的一个或多个区域。 这些区域可以包括透明和/或反射区域。 不均匀区域还可以包括具有比基于辐射的区域的电导率更高的导电率的一个或多个区域，例如至少高10％。
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