Abstract:
Electrical connections are made between a pair of elements (32, 38) disposed on opposite side of a hole (28) extending through a dielectric layer (20) by evaporating a conductive material (40) such as a metal having high vapor pressure within the hole while maintaining the hole in a substantially sealed condition. The process may be performed simultaneously to form numerous connections within a microelectronic unit as, for example, within a multilayer circuit panel.
Abstract:
A microelectronic package (1310) can include a substrate (1340) having first and second surfaces (1341, 1342), and first and second microelectronic elements (1320, 1330). The substrate (1340) can have substrate contacts (1347a, 1347b) at a first surface (1341) and a plurality of terminals (1350) at a second surface (1342). Element contacts (1324, 1334) of the microelectronic elements 1320, 1330 can be joined with corresponding ones of the substrate contacts (1347a, 1347b). A front surface (1331) of the second microelectronic element (1330) can partially overlie a rear surface (1322) of the first microelectronic element (1320) and can be attached thereto. The element contacts (1324) of the first microelectronic element (1320) can be arranged in an area array and can be flip chip bonded with the substrate contacts (1347a). The element contacts (1334) of the second microelectronic element (1330) can be joined with the substrate contacts (1347b) by conductive masses (1375).
Abstract:
An assembly 100 and method of making same are provided. The assembly 100 can include a first component 105 including a dielectric region 120 having an exposed surface 122, a conductive pad 134 at the surface 122 defined by a conductive element 132 having at least a portion extending in an oscillating or spiral path along the surface 122, and a an electrically conductive bonding material 140 joined to the conductive pad 134 and bridging an exposed portion 137 of the dielectric surface 122 between adjacent segments 136, 138. The conductive pad 134 can permit electrical interconnection of the first component 105 with a second component 107 having a terminal 108 joined to the pad 134 through the electrically conductive bonding material 140. The path of the conductive element 132 may or may not overlap or cross itself.
Abstract:
A method of bonding first and second microelectronic elements includes pressing together a first substrate 100 containing active circuit elements 108 therein with a second substrate 112, with a flowable dielectric material 102 between confronting surfaces of the respective substrates, each of the first and second substrates 100,112 having a coefficient of thermal expansion less than 10 parts per million/ °C, at least one of the confronting surfaces having a plurality of channels 118A-118F extending from an edge of such surface, such that the dielectric material 102 between planes defined by the confronting surfaces is at least substantially free of voids and has a thickness over one micron, and at least some of the dielectric material 102 flows into at least some of the channels.
Abstract:
A microelectronic package has a microelectronic element 110 overlying or mounted to a first surface 102 of a substrate 100 and substantially rigid conductive posts 106 projecting above the first surface or projecting above a second surface 104 of the substrate remote therefrom. Conductive elements 108 exposed at a surface of the substrate opposite the surface above which the conductive posts project are electrically interconnected with the microelectronic element. An encapsulant 130 overlies at least a portion of the microelectronic element 110 and the surface 102 of the substrate 100 above which the conductive posts 106 project, the encapsulant having a recess 336 or one or more openings 136, 236 each permitting at least one electrical connection to be made to at least one conductive post. At least some conductive posts 106 are electrically insulated from one another and adapted to simultaneously carry different electric potentials. In particular embodiments, the openings 136, 140, 146, 236 in the encapsulant 130 at least partially expose conductive masses 144 joined to posts, fully expose top surfaces 126 of posts 106 and partially expose edge surfaces 138 of posts, or may only partially expose top surfaces 126 of posts.
Abstract:
A microelectronic assembly 700 includes a dielectric element 730 having at least one aperture 733 and electrically conductive elements thereon including terminals 740 exposed at the second surface of the dielectric element 730; a first microelectronic element 712 having a rear surface and a front surface facing the dielectric element 730, the first microelectronic element 712 having a plurality of contacts exposed at the front surface thereof; a second microelectronic element 714 having a rear surface and a front surface facing the rear surface of the first microelectronic element 712, the second microelectronic element 714 having a plurality of contacts exposed at the front surface and projecting beyond an edge of the first microelectronic element 712; and an electrically conductive plane 790 attached to the dielectric element 730 and at least partially positioned between the first and second apertures 733,739, the electrically conductive plane 790 being electrically connected with one or more of the contacts of at least one of the first or second microelectronic elements 712,714.
Abstract:
A microelectronic unit 12 includes a substrate 20 and an electrically conductive element 40. The substrate 20 can have a CTE less than 10 ppm/°C, a major surface 21 having a recess 30 not extending through the substrate, and a material 50 having a modulus of elasticity less than 10 GPa disposed within the recess. The electrically conductive element 40 can include a joining portion 42 overlying the recess 30 and extending from an anchor portion 41 supported by the substrate 20. The joining portion 42 can be at least partially exposed at the major surface 21 for connection to a component 14 external to the microelectronic unit 12.
Abstract:
A microelectronic assembly includes a dielectric element 930B having oppositely-facing first and second surfaces and one or more apertures 972 extending between the surfaces, the dielectric element further having conductive elements thereon; a first microelectronic element 900A having a rear surface and a front surface facing the first surface of the dielectric element 930B, the first microelectronic element 900A having a first edge and a plurality of contacts exposed at the front surface thereof; a second microelectronic element 900B including having a rear surface and a front surface facing the rear surface of the first microelectronic element 900A, a projecting portion of the front surface of the second microelectronic element 900B extending beyond the first edge of the first microelectronic element 900A, the projecting portion being spaced from the first surface of the dielectric element 930B, the second microelectronic element 900B having a plurality of contacts exposed at the projecting portion of the front surface; leads extending from contacts of the microelectronic elements through the at least one aperture to at least some of the conductive elements; and a heat spreader 970 thermally coupled to at least one of the first microelectronic element 900A or the second microelectronic element 900B.
Abstract:
A microelectronic unit 400 can include a semiconductor element 401 having a front surface, a microelectronic semiconductor device adjacent to the front surface, contacts 403 at the front surface and a rear surface remote from the front surface. The semiconductor element 401 can have through holes 410 extending from the rear surface through the semiconductor element 401 and through the contacts 403. A dielectric layer 411 can line the through holes 410. A conductive layer 412 may overlie the dielectric layer 411 within the through holes 410. The conductive layer 412 can conduct ively interconnect the contacts 403 with unit contacts.
Abstract:
A stacked microelectronic unit is provided which can include a plurality of vertically stacked microelectronic elements (12, 12A) each having a front surface (117), contacts (22) exposed at the front surface, a rear surface (118) and edges (18, 20) extending between the front and rear surfaces. Traces (24) connected with the contacts may extend along the front surfaces towards edges of the microelectronic elements with the rear surface of at least one of the stacked microelectronic elements being adjacent to a top face (90) of the microelectronic unit. A plurality of conductors (66) may extend along edges of the microelectronic elements from the traces (24) to the top face (90). The conductors may be conductively connected with unit contacts (76) such that the unit contacts overlie the rear surface (118) of the at least one microelectronic element (12A) adjacent to the top face.