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    Membrane Structure Element and Method for Manufacturing Same
    52.
    发明申请
    Membrane Structure Element and Method for Manufacturing Same 有权
    膜结构元件及其制造方法

    公开(公告)号：US20090176064A1

    公开(公告)日：2009-07-09

    申请号：US12225670

    申请日：2007-03-28

    Applicant: Takayuki Hirano ,  Nobuyuki Kawakami ,  Masato Kannaka

    Inventor： Takayuki Hirano ,  Nobuyuki Kawakami ,  Masato Kannaka

    IPC: B32B3/10 ,  B05D3/02 ,  B05D5/12 ,  C23C16/513 ,  H01L21/306

    CPC classification number: G01F1/692 ,  B81B2201/0278 ,  B81B2203/0127 ,  B81C1/00666 ,  B81C2201/0169 ,  B81C2201/0178 ,  C23C16/402 ,  C23C16/56 ,  Y10T428/24488 ,  Y10T428/24612

    Abstract: It is intended to provide a membrane structure element that can be easily manufactured, has an excellent insulating property and high quality; and a method for manufacturing the membrane structure element. The manufacturing method is for manufacturing a membrane structure element including a membrane formed of a silicon oxide film and a substrate which supports the membrane in a hollow state by supporting a part of a periphery of the membrane. The method includes: a film formation step of forming a heat-shrinkable silicon oxide film 13 on a surface of a silicon substrate 2 by plasma CVD method; a heat treatment step of performing a heat treatment to cause the thermal shrinkage of the silicon oxide film 13 formed on the substrate 1; and a removal step of removing a part of the substrate 2 in such a manner that a membrane-corresponding part of the silicon oxide film 13 is supported as a membrane in a hollow state with respect to the substrate 2 to form a recessed part 4.

    Abstract translation: 本发明提供可以容易地制造，具有优异的绝缘性和高质量的膜结构元件; 和膜结构元件的制造方法。 该制造方法是用于制造包括由氧化硅膜形成的膜的膜结构元件和通过支撑膜的周边的一部分而将膜支撑在中空状态的基板。 该方法包括：通过等离子体CVD法在硅衬底2的表面上形成热收缩氧化硅膜13的成膜步骤; 对形成在基板1上的氧化硅膜13的热收缩进行热处理的热处理工序; 以及去除基板2的一部分的去除步骤，使得氧化硅膜13的膜相应部分作为相对于基板2的中空状态的膜被支撑以形成凹部4。

    Method of making a thick microstructural oxide layer and device utilizing same
    53.
    发明申请
    Method of making a thick microstructural oxide layer and device utilizing same 失效
    制造厚的微结构氧化物层的方法和利用它的装置

    公开(公告)号：US20030224565A1

    公开(公告)日：2003-12-04

    申请号：US10342949

    申请日：2003-01-15

    Inventor： Khalil Najafi ,  Chunbo Zhang

    IPC: H01L021/8238

    CPC classification number: F28F13/185 ,  B81B2203/033 ,  B81C1/0038 ,  B81C2201/0132 ,  B81C2201/0178 ,  F28F2260/00 ,  H01L21/76208

    Abstract: A method of fabricating a thick silicon dioxide layer without the need for long deposition or oxidation and a device having such a layer are provided. Deep reactive ion etching (DRIE) is used to create high-aspect ratio openings or trenches and microstructures or silicon pillars, which are then oxidized and/or refilled with LPCVD oxide or other deposited silicon oxide films to create layers as thick as the DRIE etched depth allows. Thickness in the range of 10-100 nullm have been achieved. Periodic stiffeners perpendicular to the direction of the trenches are used to provide support for the pillars during oxidation. The resulting SiO2 layer is impermeable and can sustain large pressure difference. Thermal tests show that such thick silicon dioxide diaphragms or layers can effectively thermally isolate heated structures from neighboring structures and devices within a distance of hundred of microns. Such SiO2 diaphragms or layers of thickness 50-60 nullm can sustain an extrinsic shear stress up to 3-5 Mpa. These thick insulating microstructures or layers can be used in thermal, mechanical, fluidic, optical, and bio microsystems.

    Abstract translation: 提供了制造厚二氧化硅层而不需要长时间沉积或氧化的方法和具有这种层的器件。 深反应离子蚀刻（DRIE）用于产生高纵横比的开口或沟槽和微结构或硅柱，然后用LPCVD氧化物或其他沉积的氧化硅膜氧化和/或再填充以产生与DRIE蚀刻的厚度相同的层 深度允许。 已达到10-100mam范围内的厚度。 垂直于沟槽方向的周期性加强筋用于在氧化过程中为支柱提供支撑。 所得的SiO 2层是不渗透的并且可以承受较大的压力差。 热测试表明，这种厚的二氧化硅隔膜或层可以有效地将加热的结构与邻近的结构和器件隔离在一百微米的距离内。 这种厚度为50-60μm的SiO 2膜片或层可承受高达3-5Mpa的外在剪切应力。 这些厚的绝缘微结构或层可用于热，机械，流体，光学和生物微系统。

    Method of smoothing a trench sidewall after a deep trench silicon etch process
    54.
    发明申请
    Method of smoothing a trench sidewall after a deep trench silicon etch process 失效
    在深沟槽硅蚀刻工艺之后平滑沟槽侧壁的方法

    公开(公告)号：US20030211752A1

    公开(公告)日：2003-11-13

    申请号：US10137543

    申请日：2002-05-01

    Inventor： Michael Rattner ,  Jeffrey D. Chinn

    IPC: H01L021/302 ,  H01L021/461

    CPC classification number: B81C1/00611 ,  B81B2203/033 ,  B81C2201/0126 ,  B81C2201/0178 ,  H01L21/3065 ,  H01L21/30655

    Abstract: Disclosed herein is a method of smoothing a trench sidewall after a deep trench silicon etch process which minimizes sidewall scalloping present after the silicon trench etch. The method comprises exposing the silicon trench sidewall to a plasma generated from a fluorine-containing gas, at a process chamber pressure within the range of about 1 mTorr to about 30 mTorr, for a time period within the range of about 10 seconds to about 600 seconds. A substrate bias voltage within the range of about null10 V to about null40 V is applied during the performance of the post-etch treatment method of the invention.

    Abstract translation: 这里公开了一种在深沟槽硅蚀刻工艺之后平滑沟槽侧壁的方法，其最小化在硅沟槽蚀刻之后存在的侧壁扇形。 该方法包括将硅沟槽侧壁暴露于在约1mTorr至约30mTorr范围内的处理室压力下从含氟气体产生的等离子体，时间范围为约10秒至约600 秒。 在本发明的蚀刻后处理方法的执行期间，施加约-10V至约-40V范围内的衬底偏置电压。

    Procédé de fabrication d'une structure fixe définissant un volume recevant un élément mobile notamment d'un MEMS
    57.
    发明公开
    Procédé de fabrication d'une structure fixe définissant un volume recevant un élément mobile notamment d'un MEMS 有权
    制造特定的体积，其中，移动元件，特别是MEMS要被插入的固体结构的方法，

    公开(公告)号：EP2404868A1

    公开(公告)日：2012-01-11

    申请号：EP11171866.4

    申请日：2011-06-29

    Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES

    Inventor： Dieppedale, Christel ,  Borel, Stephan ,  Reig, Bruno ,  Sibuet, Henri

    IPC: B81C1/00

    CPC classification number: B81C1/00158 ,  B81B2201/018 ,  B81B2201/0264 ,  B81B2203/0118 ,  B81B2203/0361 ,  B81C1/00492 ,  B81C2201/0178 ,  H01H1/0036

    Abstract: L' invention concerne la fabrication d'une structure fixe (20) de semi-conducteur définissant un volume (10), par exemple d'un microsystème électromécanique MEMS (1).
    Le procédé comprend :
    la détermination préalable (E100) d'épaisseurs Ei en fonction de distances fonctionnelles (b,p,c) associées à des éléments (30, 32, 34),
    la formation (E210, E220, E230) d'au moins un élément sur un substrat (21), cette formation (E210, E220, E230) comprenant une oxydation thermique (E214, E224, E234) du substrat (21) pour former une couche (23, 26, 27) d'épaisseur E1 en oxyde, suivie d'une gravure sélective (E216, E226, E236) de la couche (23, 26, 27) d'oxyde pour définir ledit volume (10) dans une portion gravée (25) par mise à nu du substrat sous-jacent et pour définir l'élément dans une portion non gravée (24), et
    une oxydation ultérieure (E240) du substrat pour former une couche (28) d'épaisseur E4 en oxyde, de sorte à obtenir les éléments présentant lesdites distances fonctionnelles.

    Abstract translation: 该方法包括基于在元件相关联的垂直尺寸确定性采矿厚度（E2）E.G. 停止（32）。 的元件是形成在一个硅衬底（21）。 基板的热氧化在部分进行在其表面上，以形成热氧化物层。 该层被蚀刻在蚀刻和非蚀刻部分（24，25），以限定一个腔和元件。 基板的热氧化被执行以在裸露部分形成氧化硅层，以便获得与所述维度中的元件。 因此独立claimsoft包括一种用于制造微机电系统的方法。

    MIKROMECHANISCHER SENSOR
    58.
    发明授权
    MIKROMECHANISCHER SENSOR 有权
    微机械传感器

    公开(公告)号：EP1716070B1

    公开(公告)日：2008-07-02

    申请号：EP04802963.1

    申请日：2004-12-20

    Applicant: Robert Bosch GmbH

    Inventor： BAER, Hans-Peter ,  HOECHST, Arnim

    IPC: B81B3/00

    CPC classification number: B81C1/00182 ,  B81B2201/0292 ,  B81B2203/0127 ,  B81B2203/0315 ,  B81B2203/0353 ,  B81C2201/0178

    Abstract: The invention concerns a micromechanical sensor and a method for the production thereof. According to the invention, the diaphragm can be reliably mounted regardless of process-related vibrations of the cavern etching process and the diaphragm can be provided in any shape due to the fact that a suitable binding of the diaphragm in an oxide layer produced by local oxidation is formed. The micromechanical sensor comprises: at least one substrate (1); an outer oxide layer (9) formed in a laterally outer region (4) in the substrate (1); a diaphragm (15) formed in a laterally inner diaphragm region (5) and having a number of perforations (16), and; a cavern (14) etched into the substrate (1) underneath the diaphragm (15), said diaphragm (15) being suspended in a suspending region (10) of the outer oxide layer (9), this region tapering toward the binding points (12) of the diaphragm (15), and the diaphragm (15) is, in the vertical height thereof, placed between a top side (17) and an underside (19) of the outer oxide layer (9).

    VERFAHREN ZUM HERSTELLEN VON ISOLATIONSSTRUKTUREN
    59.
    发明公开
    VERFAHREN ZUM HERSTELLEN VON ISOLATIONSSTRUKTUREN 有权
    一种用于制造隔离结构的方法

    公开(公告)号：EP1585702A2

    公开(公告)日：2005-10-19

    申请号：EP03756438.2

    申请日：2003-09-12

    Applicant: Conti Temic microelectronic GmbH

    Inventor： AIKELE, Matthias ,  ENGELHARDT, Albert ,  FREY, Marcus ,  HARTMANN, Bernhard ,  SEIDEL, Helmut

    IPC: B81C1/00

    CPC classification number: B81C1/00698 ,  B81B2201/0235 ,  B81B2203/033 ,  B81C2201/0178

    Abstract: The invention relates to methods for producing insulation structures for micromechanical sensors according to a monocrystalline surface technique. According to known methods, silicon structures defined by deep trenches are etched and the lower side thereof facing the substrate is exposed by a release etch step. The filling of said trenches with a dielectrically insulating material, such as silicon dioxide, enables the silicon structure to be solidly clutched on three sides. The invention is based on the fact that instead of filling trenches, thin-walled silicon is converted into an electrically non-conductive material. This can be carried out, for example, by means of thermal oxidation of narrow silicon sections previously exposed by trenches. In a minimal configuration, two trenches (holes) must be etched per section with the desired structural depth. The interlying silicon section must be narrow enough to be able to be fully thermally oxidised.

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