公开(公告)号：JP2001101609A

公开(公告)日：2001-04-13

申请号：JP2000275203

申请日：2000-09-11

Applicant: ST MICROELECTRONICS INC

Inventor： PATTI GUISEPPE ,  ALINI ROBERTO ,  PAKRISWAMY ELANGO

IPC: G11B5/09 ,  G11B5/012 ,  G11B5/02

Abstract: PROBLEM TO BE SOLVED: To provide an improved circuit and the method for driving a writing head of a disk storage device. SOLUTION: When the current flowing direction through the writing head is inverted from the 1st direction supplying the current to the writing head through a writing head terminal to the 2nd direction drawing out the current from the writing head through the writing head terminal, a bootstrap circuit and a current sync circuit are activated to enable the current to be quickly drawn out from the writing head.

公开(公告)号：JP2001057081A

公开(公告)日：2001-02-27

申请号：JP2000215992

申请日：2000-07-17

Applicant: ST MICROELECTRONICS INC

Inventor： BRADY JAMES

IPC: G11C11/417 ,  G11C7/10 ,  G11C7/12 ,  G11C11/401 ,  G11C11/409 ,  G11C11/4094 ,  G11C11/4096 ,  G11C16/06

Abstract: PROBLEM TO BE SOLVED: To enable writing directly data in a memory cell by making a data bit bypass a sense amplifier and writing directly data in a bit line from an I/O data line when a first transmission gate is turned on and a second transmission gate is turned off. SOLUTION: A BLK line 140 makes a BLK pass gate 130 a turn-off state (the BLK pass gate 130 is in a high impedance state) as a logical low voltage level, and separates a sense amplifier 135 from a pair of bit line 110. An I/O enable-line 160 is made a logical low voltage level, an I/O pass gate 155 is turned off, and the sense amplifier 135 is bypassed during a write-in period. A write-in signal 310 is made a logical high voltage level, a write-in pass gate 300 is turned on, and an I/O data line 145 is electrically connected to the pair of bit line 110. Data in the I/O data line is written in the bit line 110, successively, written in a memory cell 105.

公开(公告)号：JP2001043675A

公开(公告)日：2001-02-16

申请号：JP2000215447

申请日：2000-07-17

Applicant: ST MICROELECTRONICS INC

Inventor： BRADY JAMES

IPC: G11C11/401 ,  G11C7/06 ,  G11C7/10 ,  G11C7/22 ,  G11C11/409

Abstract: PROBLEM TO BE SOLVED: To access efficiently with data of a large block by separating a sense amplifier from a reference voltage source, balancing voltage levels, connecting one row of a memory cell to a bit line, driving to a voltage level having a binary data value, coupling a sense amplifier to the reference voltage source, driving a bit line, and separating a row of a memory cell from a bit line. SOLUTION: A DRAM device 1 has a memory cell array 2 constituted as rows of a memory cell, and a memory cell in each row is connected to one of word lines. A memory cell in each column in the memory cell array 2 is connected to one of bit lines. A row 3 consisting of sense amplifiers 30 is connected to one pair of bit line of the memory cell array 2. In a row 5 consisting of latch elements 50, one latch element 50 is coupled to each pair of bit line in the memory cell array 2, during a single memory cycle period, data are written or read out in/from a whole row consisting of memory cells in the memory cell array 2.

公开(公告)号：JP2000187980A

公开(公告)日：2000-07-04

申请号：JP35142399

申请日：1999-12-10

Applicant: ST MICROELECTRONICS INC

Inventor： TAYLOR RONALD T

IPC: G11C11/407 ,  G11C8/08 ,  G11C11/408

Abstract: PROBLEM TO BE SOLVED: To provide a method boosting a voltage level of a word line in a DRAM in a mode in which an electric field applied to a gate oxide film of a memory cell access MOSFET is reduced. SOLUTION: When a word line level reaches VDD, a word line is stopped at a VDD level by disabling a decoder. A sense amplifier is separated, and word line voltage is made to enable following bit line voltage through capacitive coupling crossing an access MOSFET of a memory cell in which reading or writing is performed. Consequently, when bit line voltage is raised, word line voltage is increased to super-high voltage. After word line voltage reaches super-high voltage, the sense amplifier is connected, word line voltage is driven toward a VDD level and also a disabled bit line is driven toward GND. At the time of finish of a word line clock signal, the voltage is a GND potential and each bit line is restored to an intermediate voltage level.

公开(公告)号：JP2000163902A

公开(公告)日：2000-06-16

申请号：JP32505599

申请日：1999-11-16

Applicant: ST MICROELECTRONICS INC

Inventor： MENEGOLI PAOLO

IPC: G11B21/12 ,  G11B19/20 ,  G11B19/22 ,  H02M3/155

Abstract: PROBLEM TO BE SOLVED: To use a boost circuit in a low-voltage disk drive system by providing an inductive device connected to receive a second supply voltage and a charge storage device connected to the inductive device, for generating a first supply voltage, generating a current at a prescribed frequency through the inductive device and generating a voltage, while traversing the charge storage device. SOLUTION: When a signal in a node D vibrates, a transistor M1 is turned on/off. When the transistor M1 is turned off, and the transistor M2 is turned on, the transistor p1 is turned on, and a transistor Q1 in an inductive boost circuit 84 is turned on, and the current flows through an inductance L1 of the inductive boost circuit 84 and the transistor Q1. When the transistor M1 is turned on, the transistors M2, p1, Q1 are turned off. The diode D2 of the inductive boost circuit 84 is forward biased, and a capacitor C2 is charged.

公开(公告)号：JP2000163705A

公开(公告)日：2000-06-16

申请号：JP32907799

申请日：1999-11-19

Applicant: ST MICROELECTRONICS INC

Inventor： PATTI GUISEPPE ,  LEE EUGENE C ,  ALINI ROBERTO

IPC: G11B5/09 ,  G11B5/00 ,  G11B5/012 ,  G11B5/02 ,  G11B20/10 ,  G11B20/24 ,  G11B27/36

Abstract: PROBLEM TO BE SOLVED: To remove the ringing and unnecessary offset of a read signal by making resistance values equal to a 1st and a 2nd specific resistance value in response to a 1st and a 2nd control input and generating the 2nd control input in response to the detection of a thermal event. SOLUTION: An effective resistance value is given by a resistance R1 and the programmed resistance value of a resistance R1 and a variable resistance value circuit 132 and the cutoff frequency of a filter 112 varies as the resistance value of the variable resistance value circuit 132 varies. In a normal operation period of a read channel, the resistance value of the variable resistance value circuit 132 is relatively high impedance and the effective resistance value of the filter 112 becomes substantially equal to the resistance value of the resistance R1. When thermal variation is detected, the effective resistance value of the filter 112 decreases to increase the cutoff frequency. This effective resistance value decreases by programming the variable resistance value circuit 132 to a specific resistance value in response to the input signal from a control circuit 110.

公开(公告)号：JP2000149206A

公开(公告)日：2000-05-30

申请号：JP31331899

申请日：1999-11-04

Applicant: ST MICROELECTRONICS INC

Inventor： PATTI GUISEPPE ,  AXEL ALLEGRET DE LA SJORLES

IPC: G11B5/39 ,  G11B5/00 ,  G11B5/012 ,  G11B5/02 ,  G11B5/03 ,  G11B5/09 ,  G11B5/40 ,  G11B5/455 ,  G11B19/02

Abstract: PROBLEM TO BE SOLVED: To make selectable a magnetioresistance head between two mode biases for biasing by enabling either of bias voltage and bias current to be supplied to the MR head by a simple pre-amplifier. SOLUTION: When a voltage bias is selected, an input signal 301 to a mode selector 302 is supplied as an output on a voltage bias line VBias, a signal indicating a desired value of bias to be used on a reading head 206 is supplied as an input to voltage DAC 308. Therefore, the level of the VBias supplied onto an output end is directly decided by a bias value input signal 301, also fed back through a loop 320, and precise desired voltage is obtained crossing the head 206. When current bias is selected, a bias input signal 301 is supplied as an output IBias on a current bias line. A reference current is used as a current source for current DAC 310, and a selected value is supplied as an output about IBias.

公开(公告)号：JP2000137613A

公开(公告)日：2000-05-16

申请号：JP30471099

申请日：1999-10-26

Applicant: ST MICROELECTRONICS INC

Inventor： NARESH H SONI

IPC: G06F9/32 ,  G06F9/00 ,  G06F9/06 ,  G06F9/318 ,  G06F13/16 ,  G06F13/40

Abstract: PROBLEM TO BE SOLVED: To improve the speed and efficiency of a microprocessor while maintaining the interchangeability of instruction set architectures. SOLUTION: A virtual condition code(VCC) for controlling an instruction sequence in a microprocessor is used. The virtual condition code is not controlled by a programmer, and stored in an inside non-architecture type register to be used by various kinds of microprocessor instruction for deciding when branching should be operated. For example, the virtual condition code can be used as a condition for operation branching from a series or repeated instructions. The virtual condition makes it possible to remove one part of overhead on processing to be used at the time of deciding whether or not successive digits such as count values in the register are 0 related with the repeated instructions of a loop or the like.

公开(公告)号：JP2000112714A

公开(公告)日：2000-04-21

申请号：JP27892599

申请日：1999-09-30

Applicant: ST MICROELECTRONICS INC

Inventor： NGUYEN THI N

IPC: G06F7/52 ,  G06F7/523 ,  G06F7/544

Abstract: PROBLEM TO BE SOLVED: To reduce the repeat of multiplication and also execute accelerated multiplication by comparing the cache look-up bit of a multiplicand with a preceding multiplicand. SOLUTION: A multiplier circuit 306 performs an operation about a multiplicand 302 and a multiplier 304. The multiplier 304 is designated as a constant and an output is supplied onto a line 308. When required number repeat takes place, a data effective line 310, for instance, shows a clear value such as true and when the value is detected, a result on the line 308 becomes a final product. The multiplicand is divided into a cache look-up bit(CLB) part and a table look-up bit(TLB) part. For sequential multiplicands, values are close to each other, the CLB part does not change, what is more important is that the CLB part of the product does not change and this fact enables the number of repeats which is needed to reach a final product to be reduced.

公开(公告)号：JP2000067580A

公开(公告)日：2000-03-03

申请号：JP23220099

申请日：1999-08-19

Applicant: ST MICROELECTRONICS INC

Inventor： BRADY JAMES ,  WORLEY JAMES L

IPC: G11C11/409 ,  G11C7/12

Abstract: PROBLEM TO BE SOLVED: To quickly and surely drive bit lines and memory cells to complete reference voltage levels by detecting electric charge appearing on a corresponding bit line pair from the reading of data from a DRAM cell and also driving the bit line pair to complete reference voltage levels Vdd/Vss. SOLUTION: When the voltage of a bit line 2 is higher a little and the voltage of a bit line 3 is lower a little as compared with a voltage Vdd/2 from the result of reading those voltages a sense amplifier reference line 18 is driven to a low reference voltage level Vss and succeedingly a recovery control line 14 is driven to a high reference voltage level Vdd. A sense amplifier 7 detects the voltage difference between nodes 15, 16 and starts to drive the nodes 15, 16 to the high reference voltage level Vdd and the low reference voltage level Vss respectively. When pass/transmission gates 8, 9 are both turned ON, bit lines 2, 3 follow up voltage levels of the nodes 15, 16 respectively. As a result, a second transistor 12 is turned ON to pull up the bit line 2 to the high reference voltage level Vdd quickly.