公开(公告)号：CA2940891A1

公开(公告)日：2015-10-01

申请号：CA2940891

申请日：2015-03-06

Applicant: IBM

Inventor： HELLER LISA CRANTON ,  KUBALA JEFFREY PAUL ,  BUSABA FADI YUSUF ,  BRADBURY JONATHAN DAVID ,  FARRELL MARK ,  OSISEK DAMIAN LEO ,  GREINER DAN ,  SLEGEL TIMOTHY ,  SCHMIDT DONALD WILLIAM ,  GAINEY CHARLES ,  JACOBI CHRISTIAN

IPC: G06F9/50 ,  G06F9/455 ,  G06F9/48

Abstract: Embodiments relate to multithreading in a computer. An aspect is a computer including a configuration having a core which includes physical threads and is operable in single thread (ST) and multithreading (MT) modes. The computer also includes a host program configured to execute in the ST mode on the core to issue a start-virtual-execution (start-VE) instruction to dispatch a guest entity which includes a guest virtual machine (VM). The start-VE instruction is executed by the core and includes obtaining a state description, having a guest state, from a location specified by the start-VE instruction. The execution includes determining, based on the guest state, whether the guest entity includes a single guest thread or multiple guest threads, and starting the guest threads in the MT mode or ST mode based on the guest state and a determination of whether the guest entity includes a single guest thread or multiple guest threads.

公开(公告)号：AU2013375140A1

公开(公告)日：2015-07-16

申请号：AU2013375140

申请日：2013-12-06

Applicant: IBM

Inventor： BRADBURY JONATHAN DAVID ,  SCHWARZ ERIC MARK ,  SLEGEL TIMOTHY ,  GSCHWIND MICHAEL KARL

IPC: G06F17/16

Abstract: Vector exception handling is facilitated. A vector instruction is executed that operates on one or more elements of a vector register. When an exception is encountered during execution of the instruction, a vector exception code is provided that indicates a position within the vector register that caused the exception. The vector exception code also includes a reason for the exception.

公开(公告)号：SG11201503786QA

公开(公告)日：2015-06-29

申请号：SG11201503786Q

申请日：2013-12-06

Applicant: IBM

Inventor： BRADBURY JONATHAN DAVID ,  SCHWARZ ERIC MARK ,  SLEGEL TIMOTHY ,  GSCHWIND MICHAEL KARL

IPC: G06F17/16

公开(公告)号：DE112013001466T5

公开(公告)日：2014-12-04

申请号：DE112013001466

申请日：2013-03-01

Applicant: IBM

Inventor： SLEGEL TIMOTHY ,  BRADBURY JONATHAN DAVID ,  GSCHWIND MICHAEL KARL

IPC: G06F9/30 ,  G06V30/224

Abstract: Mehrere Gruppen von Zeichendaten, die Abschlusszeichen aufweisen, werden unter Verwendung einer Parallelverarbeitung verglichen, ohne dass unzulässige Ausnahmebedingungen bewirkt werden. Jede Gruppe von Zeichendaten, die verglichen werden soll, wird in ein oder mehrere Vektorregister geladen. Damit jede Gruppe von Zeichendaten verglichen wird, wird bei einer Ausführungsform im Wesentlichen ein Befehl verwendet, der Daten in ein Vektorregister bis zu einer spezifizierten Grenze lädt und eine Möglichkeit bereitstellt, die Anzahl von Zeichen zu ermitteln, die geladen wurden. Des Weiteren wird ein Befehl verwendet, um den Index des ersten Begrenzungszeichens, d. h. das erste Zero- oder Null-Zeichen oder den Index von unterschiedlichen Zeichen, zu finden. Unter Verwendung dieser Befehle wird eine Speicherposition des Endes von einer dieser Gruppen von Daten oder eine Speicherposition eines unterschiedlichen Zeichens rationell bereitgestellt.

公开(公告)号：MX2014010946A

公开(公告)日：2014-11-13

申请号：MX2014010946

申请日：2012-11-15

Applicant: IBM

Inventor： SLEGEL TIMOTHY ,  SCHWARZ ERIC MARK ,  BRADBURY JONATHAN DAVID ,  GSCHWIND MICHAEL KARL ,  JACOBI CHRISTIAN

IPC: G06F12/10

Abstract: Se provee una instrucción de carga a frontera de bloque que carga un número variable de bytes de datos a un registro mientras que asegura que no se cruce una frontera de memoria especificada. La frontera puede ser especificada de una diversidad de maneras, incluyendo pero no limitado a un valor variable en el texto de instrucción, un valor de texto de instrucción fijo codificada en el código de operación o una frontera a base de registro.

公开(公告)号：MX2014010945A

公开(公告)日：2014-11-13

申请号：MX2014010945

申请日：2013-03-07

Applicant: IBM

Inventor： SLEGEL TIMOTHY ,  SCHWARZ ERIC MARK ,  BRADBURY JONATHAN DAVID

IPC: G06F9/30

Abstract: Se describe el procesamiento de datos de caracteres que es facilitado. Se provee una instrucción de comparar intervalos de serie de vectores que compara cada elemento de un vector con un intervalo de valores en base a un conjunto de controles para determinar si hay una coincidencia. Un índice asociado con el elemento coincidente o una máscara que representa el elemento coincidente es almacenado en un registro de vector objetivo. Además, la misma instrucción, la instrucción de comparar intervalos de serie de vectores, también busca un vector seleccionado en cuanto a elementos nulos, también referidos como elementos cero.

公开(公告)号：SG11201404858XA

公开(公告)日：2014-09-26

申请号：SG11201404858X

申请日：2013-03-01

Applicant: IBM

Inventor： BRADBURY JONATHAN DAVID ,  GSCHWIND MICHAEL KARL ,  SLEGEL TIMOTHY

IPC: H03M7/40

公开(公告)号：SG11201404822XA

公开(公告)日：2014-09-26

申请号：SG11201404822X

申请日：2012-11-15

Applicant: IBM

Inventor： BRADBURY JONATHAN DAVID ,  GSCHWIND MICHAEL KARL ,  SCHWARZ ERIC MARK ,  SLEGEL TIMOTHY ,  JACOBI CHRISTIAN

IPC: G11C11/00

Abstract: A Load Count to Block Boundary instruction is provided that provides a distance from a specified memory address to a specified memory boundary. The memory boundary is a boundary that is not to be crossed in loading data. The boundary may be specified a number of ways, including, but not limited to, a variable value in the instruction text, a fixed instruction text value encoded in the opcode, or a register based boundary; or it may be dynamically determined.

公开(公告)号：CA2867117A1

公开(公告)日：2013-09-19

申请号：CA2867117

申请日：2013-03-01

Applicant: IBM

Inventor： BRADBURY JONATHAN DAVID ,  GSCHWIND MICHAEL KARL ,  SLEGEL TIMOTHY

IPC: H03M7/40

Abstract: The length of character data having a termination character is determined. The character data for which the length is to be determined is loaded, in parallel, within one or more vector registers. An instruction is used that loads data in a vector register to a specified boundary, and provides a way to determine the number of characters loaded, using, for instance, another instruction. Further, an instruction is used to find the index of the first termination character, e.g., the first zero or null character. This instruction searches the data in parallel for the termination character. By using these instructions, the length of the character data is determined using only one branch instruction.

公开(公告)号：CA2867088A1

公开(公告)日：2013-09-19

申请号：CA2867088

申请日：2012-11-15

Applicant: IBM

Inventor： BRADBURY JONATHAN DAVID ,  GSCHWIND MICHAEL KARL ,  SLEGEL TIMOTHY ,  SCHWARZ ERIC MARK ,  JACOBI CHRISTIAN

IPC: G06F9/34

Abstract: A Load to Block Boundary instruction is provided that loads a variable number of bytes of data into a register while ensuring that a specified memory boundary is not crossed. The boundary may be specified a number of ways, including, but not limited to, a variable value in the instruction text, a fixed instruction text value encoded in the opcode, or a register based boundary.