公开(公告)号：WO2017048384A1

公开(公告)日：2017-03-23

申请号：PCT/US2016/045056

申请日：2016-08-01

Applicant: QUALCOMM INCORPORATED

Inventor： KIM, Daeik Daniel ,  BERDY, David Francis ,  LAN, Je-Hsiung Jeffrey ,  YUN, Changhan Hobie ,  KIM, Jonghae

IPC: H01L29/66 ,  H01L27/08 ,  H01L29/93 ,  H01L21/762 ,  H01L27/12

CPC classification number: H01L27/0808 ,  H01L21/7624 ,  H01L21/76264 ,  H01L21/78 ,  H01L27/1203 ,  H01L29/66174 ,  H01L29/66181 ,  H01L29/93

Abstract: A symmetric varactor structure may include a first varactor component. The first varactor component may include a gate operating as a second plate, a gate oxide layer operating as a dielectric layer and a body operating as a first plate of an area modulating capacitor. In addition, doped regions may surround the body of the first varactor component. The first varactor component may be supported on a backside by an isolation layer. The symmetric varactor structure may also include a second varactor component electrically coupled to the backside of the first varactor component through a backside conductive layer.

Abstract translation: 对称变容二极管结构可以包括第一变容二极管组件。 第一变容二极管分量可以包括作为第二板操作的栅极，作为电介质层工作的栅极氧化物层和作为区域调制电容器的第一板工作的主体。 此外，掺杂区域可围绕第一变容二极管部件的主体。 第一变容二极管组件可以由隔离层在背面支撑。 对称变容二极管结构还可以包括通过背侧导电层电耦合到第一变容二极管部件的背侧的第二变容二极管部件。

公开(公告)号：WO2017048379A1

公开(公告)日：2017-03-23

申请号：PCT/US2016/044865

申请日：2016-07-29

Applicant: QUALCOMM INCORPORATED

Inventor： LAN, Je-Hsiung Jeffrey ,  MUDAKATTE, Niranjan Sunil ,  YUN, Changhan Hobie ,  KIM, Daeik Daniel ,  ZUO, Chengjie ,  BERDY, David Francis ,  VELEZ, Mario Francisco ,  KIM, Jonghae

IPC: H01L23/522

CPC classification number: H01L27/01 ,  H01L21/4846 ,  H01L23/15 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/5223 ,  H01L23/5227 ,  H01L28/10 ,  H01L28/75 ,  H01L2224/11

Abstract: A device includes a glass substrate and a capacitor. The capacitor includes a first metal coupled to a first electrode, a dielectric structure, and a via structure comprising a second electrode of the capacitor. The first metal structure is separated from the via structure by the dielectric structure.

Abstract translation: 一种装置包括玻璃基板和电容器。 电容器包括耦合到第一电极的第一金属，电介质结构和包括电容器的第二电极的通孔结构。 第一金属结构通过电介质结构与通孔结构分离。

公开(公告)号：WO2017048369A1

公开(公告)日：2017-03-23

申请号：PCT/US2016/044103

申请日：2016-07-26

Applicant: QUALCOMM INCORPORATED

Inventor： MUDAKATTE, Niranjan Sunil ,  KIM, Daeik Daniel ,  BERDY, David Francis ,  YUN, Changhan Hobie ,  LAN, Je-Hsiung Jeffrey ,  ZUO, Chengjie ,  VELEZ, Mario Francisco ,  MIKULKA, Robert Paul ,  KIM, Jonghae

IPC: H01L27/08 ,  H01L23/522 ,  H01L23/64 ,  H01L49/02

CPC classification number: H01L28/60 ,  H01L23/5223 ,  H01L24/13 ,  H01L27/0805 ,  H01L28/87 ,  H01L28/91 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/13109 ,  H01L2224/94 ,  H01L2924/10329 ,  H01L2924/1033 ,  H01L2924/10337 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/14 ,  H01L2224/03

Abstract: An augmented capacitor structure includes a substrate and a first capacitor plate of a first conductive layer on the substrate. The augmented capacitor structure also includes an insulator layer on a surface of the first capacitor plate facing away from the substrate and a second capacitor plate. The second capacitor plate includes a second conductive layer on the insulator layer, supported by the first capacitor plate as a first capacitor. A second capacitor electrically is coupled in series with the first capacitor. The first capacitor plate is shared by the first capacitor and the second capacitor as a shared first capacitor plate. An extended first capacitor plate includes a first dummy portion of a third conductive layer and a first dummy via bar extending along the surface of the shared first capacitor plate. The first dummy portion extends along and is supported by the first dummy via bar.

Abstract translation: 增强电容器结构包括基板和在基板上的第一导电层的第一电容器板。 增强电容器结构还包括在第一电容器板的远离衬底的表面上的绝缘体层和第二电容器板。 第二电容器板包括在绝缘体层上的第二导电层，由第一电容器板作为第一电容器支撑。 与第一电容器串联耦合的第二电容器。 第一电容器板由第一电容器和第二电容器共享作为共用的第一电容器板。 扩展的第一电容器板包括第三导电层的第一虚拟部分和沿着共享的第一电容器板的表面延伸的第一虚设通孔条。 第一虚拟部分沿第一虚拟通孔条延伸并由第一虚拟通孔支撑。

公开(公告)号：WO2016048632A1

公开(公告)日：2016-03-31

申请号：PCT/US2015/048632

申请日：2015-09-04

Applicant: QUALCOMM INCORPORATED

Inventor： KIM, Daeik Daniel ,  KIM, Jonghae ,  ZUO, Chengjie ,  PARK, Sang-June ,  YUN, Changhan Hobie ,  VELEZ, Mario Francisco ,  BERDY, David Francis ,  NOWAK, Matthew Michael ,  MIKULKA, Robert Paul

IPC: H01L21/768 ,  H01L27/08 ,  H01L29/94

CPC classification number: H01L29/93 ,  H01L27/0629 ,  H01L29/94

Abstract: An apparatus includes a varactor having a first contact that is located on a first side of a substrate. The varactor includes a second contact that is located on a second side of the substrate, and the second side is opposite the first side. The apparatus further includes a signal path between the first contact and the second contact.

Abstract translation: 一种装置包括具有位于衬底的第一侧上的第一接触的变容二极管。 变容二极管包括位于衬底的第二侧上的第二接触件，第二侧面与第一侧相对。 该装置还包括在第一触点和第二触点之间的信号路径。

公开(公告)号：WO2015199936A1

公开(公告)日：2015-12-30

申请号：PCT/US2015/034220

申请日：2015-06-04

Applicant: QUALCOMM INCORPORATED

Inventor： KIM, Daeik Daniel ,  YUN, Changhan Hobie ,  VELEZ, Mario Francisco ,  ZUO, Chengjie ,  BERDY, David Francis ,  KIM, Jonghae

IPC: H01F17/00 ,  H01L49/02 ,  H01L23/64

CPC classification number: H01F27/2804 ,  H01F17/0013 ,  H01F41/04 ,  H01F2017/002 ,  H01F2017/0073 ,  H01F2017/0086 ,  H01L23/15 ,  H01L23/645 ,  H01L28/10 ,  H01L2924/0002 ,  Y10T29/49075 ,  H01L2924/00

Abstract: Methods and apparatuses, wherein the method forms a first plurality of vias in a substrate, further comprising forming the first plurality of vias to be substantially the same height. The method forms a plurality of conductive traces external to the substrate and couples the plurality of conductive traces to the first plurality of vias: wherein the plurality of conductive traces and the first plurality of vias comprise a plurality of conductive turns and wherein the plurality of conductive turns are in a spiral configuration substantially within a first plane.

Abstract translation: 方法和装置，其中所述方法在基底中形成第一多个通孔，还包括将所述第一多个通孔形成为基本上相同的高度。 该方法在衬底外部形成多个导电迹线，并将多个导电迹线耦合到第一多个通孔：其中多个导电迹线和第一多个通孔包括多个导电匝，并且其中多个导电 匝在基本上在第一平面内的螺旋构造。

公开(公告)号：WO2015134324A1

公开(公告)日：2015-09-11

申请号：PCT/US2015/018057

申请日：2015-02-27

Applicant: QUALCOMM INCORPORATED

Inventor： YUN, Changhan Hobie ,  ZUO, Chengjie ,  KIM, Jonghae ,  VELEZ, Mario Francisco ,  KIM, Daeik Daniel ,  WILCOX, Rick Allen

IPC: H03H9/02 ,  H03H9/13

CPC classification number: H03H9/02448 ,  H03H3/02 ,  H03H9/02133 ,  H03H9/02228 ,  H03H9/02244 ,  H03H9/132 ,  H03H9/133 ,  H03H9/15 ,  H03H9/462 ,  H03H9/54 ,  H03H2003/027

Abstract: An integrated circuit device (300) includes a piezoelectric substrate (302) having a first surface and a second surface opposite the first surface. The device also includes a first electrode (304) and a second electrode (306) on the first surface of the piezoelectric substrate, the first electrode (304) having a first width (314) and the second electrode (306) having a second width (316). The device further includes a third electrode (308) and a fourth electrode (310) on the second surface of the piezoelectric substrate, the third electrode (308) having a third width (318) that is substantially the same as the second width (316), and the fourth electrode (310) having a fourth width (320) that is substantially the same as the first width (314). The first and third electrodes operate as part of a first portion of a microelectromechanical systems (MEMS) resonator, and the second and fourth electrodes operate as part of a second portion of the MEMS resonator.

Abstract translation: 集成电路器件（300）包括具有第一表面和与第一表面相对的第二表面的压电基片（302）。 该装置还包括在压电基片的第一表面上的第一电极（304）和第二电极（306），第一电极（304）具有第一宽度（314），第二电极（306）具有第二宽度 （316）。 该装置还包括在压电基片的第二表面上的第三电极（308）和第四电极（310），第三电极（308）具有与第二宽度（316）基本相同的第三宽度 ），并且第四电极（310）具有与第一宽度（314）基本相同的第四宽度（320）。 第一和第三电极作为微机电系统（MEMS）谐振器的第一部分的一部分工作，第二和第四电极作为MEMS谐振器的第二部分的一部分工作。

公开(公告)号：WO2015108648A1

公开(公告)日：2015-07-23

申请号：PCT/US2014/070575

申请日：2014-12-16

Applicant: QUALCOMM INCORPORATED

Inventor： KIM, Daeik Daniel ,  VELEZ, Mario Francisco ,  ZUO, Chengjie ,  YUN, Changhan Hobie ,  KIM, Jonghae ,  NOWAK, Matthew Michael

IPC: H01L23/498 ,  H01L49/02

CPC classification number: H05K1/141 ,  H01F17/0006 ,  H01F2017/0086 ,  H01L23/49833 ,  H01L28/10 ,  H01L2224/16225 ,  H01L2924/0002 ,  H01L2924/15311 ,  H05K1/0306 ,  H05K1/113 ,  H05K1/144 ,  H05K1/181 ,  H05K2201/042 ,  H05K2201/1003 ,  Y10T29/4902 ,  H01L2924/00

Abstract: An integrated circuit device includes a first substrate supporting a pair of conductive interconnects, for example pillars. The device also includes a second substrate on the pair of conductive interconnects. The pair of conductive interconnects is arranged to operate as a first 3D solenoid inductor. The device further includes a conductive trace coupling the pair of conductive interconnects to each other.

Abstract translation: 集成电路装置包括支撑一对导电互连（例如柱）的第一基板。 该装置还包括一对导电互连上的第二基板。 一对导电互连件布置成作为第一3D螺线管电感器工作。 该器件还包括将一对导电互连件彼此耦合的导电迹线。

公开(公告)号：WO2015100067A1

公开(公告)日：2015-07-02

申请号：PCT/US2014/070517

申请日：2014-12-16

Applicant: QUALCOMM INCORPORATED

Inventor： ZUO, Chengjie ,  VELEZ, Mario Francisco ,  KIM, Jonghae ,  KIM, Daeik Daniel ,  YUN, Changhan Hobie

IPC: H01L23/522

CPC classification number: H03H7/0115 ,  H01F27/2866 ,  H01L23/5223 ,  H01L23/5227 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/4813 ,  H01L2224/48464 ,  Y10T29/417 ,  H01L2924/00014 ,  H01L2924/00

Abstract: An inductor is provided on a substrate that includes a capacitor. The inductor comprises a series of wire loops. An end of the wire loop is wire bonded to the capacitor.

Abstract translation: 在包括电容器的基板上设置电感器。 电感器包括一系列线圈。 导线环的末端引线接合到电容器。

公开(公告)号：WO2015065585A1

公开(公告)日：2015-05-07

申请号：PCT/US2014/054034

申请日：2014-09-04

Applicant: QUALCOMM INCORPORATED

Inventor： YUN, Changhan Hobie ,  ZUO, Chengjie ,  VELEZ, Mario Francisco ,  KIM, Daeik Daniel ,  KIM, Jonghae

IPC: H03H9/02 ,  H03H9/13 ,  H03H9/17 ,  H03H9/56

CPC classification number: H03H9/17 ,  H01L41/047 ,  H03H9/02157 ,  H03H9/13 ,  H03H9/56

Abstract: A resonator (300) includes a piezoelectric core (132), a set of electrodes (104, 106, 304, 306), and at least one ground terminal (108, 308). The electrodes are arranged on the piezoelectric core (132) and also includes at least one input electrode (104, 304) having a first width and at least one output electrode having a second width (106, 306) that differs from the first width. The ground terminal (108, 308) is also on the piezoelectric core (132).

Abstract translation: 谐振器（300）包括压电芯（132），一组电极（104,106,304,306）和至少一个接地端子（108,308）。 电极布置在压电芯（132）上，并且还包括具有第一宽度的至少一个输入电极（104,304）和具有与第一宽度不同的第二宽度（106,306）的至少一个输出电极。 接地端子（108,308）也在压电铁芯（132）上。

公开(公告)号：WO2014209593A1

公开(公告)日：2014-12-31

申请号：PCT/US2014/041656

申请日：2014-06-10

Applicant: QUALCOMM INCORPORATED

Inventor： KIM, Daeik D. ,  LAN, Je-Hsiung ,  VELEZ, Mario Francisco ,  ZUO, Chengjie ,  KIM, Jonghae ,  YUN, Changhan

IPC: H01L23/00

CPC classification number: H01L23/562 ,  G06F17/5081 ,  G06F2217/80 ,  H01L21/02005 ,  H01L2924/0002 ,  H01L2924/3511 ,  H01L2924/00

Abstract: An apparatus includes a device that includes at least one layer. The at least one layer includes an inter-device stress compensation pattern configured to reduce an amount of inter-device warpage prior to the device being detached from another device.

Abstract translation: 一种装置包括包括至少一层的装置。 所述至少一个层包括设备间应力补偿模式，其被配置为在所述设备从另一设备分离之前减少设备间翘曲的量。