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公开(公告)号:DE3542102A1
公开(公告)日:1986-06-05
申请号:DE3542102
申请日:1985-11-28
Applicant: RCA CORP
Inventor: CHRISTOPHER TODD J , FLING RUSSELL THOMAS
Abstract: A television receiver/monitor includes a progressive scan processor including memories for time compressing a video input signal and doubling the line rate to reduce visible line structure when the double line-rate signal is displayed. The memories are controlled to provide a video compression factor (2.5:1) greater than the display line rate increase (2:1) to provide a display retrace time (10.8 micro-seconds) substantially equal to the blanking interval (11.0 micro-seconds) of the video input signal thereby decreasing display power losses and horizontal drive requirements.
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公开(公告)号:GB2167584A
公开(公告)日:1986-05-29
申请号:GB8525660
申请日:1985-10-17
Applicant: RCA CORP
Inventor: FLING RUSSELL THOMAS
Abstract: An angle alpha from 0 DEG to 45 DEG is determined from an equation alpha DEG =LK iota (tan alpha ) iota , where iota is an index varying from 0 to n. The value of tan alpha is arrived at by dividing the smaller of the I,Q magnitude values by the larger of the two magnitude values. The angle alpha from 0 DEG to 45 DEG is transposed to the corresponding phase angle theta of the vector sum C of the orthogonal I,Q signals over the full range of values from 0 DEG to 360 DEG .
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公开(公告)号:DE3513210A1
公开(公告)日:1985-10-31
申请号:DE3513210
申请日:1985-04-12
Applicant: RCA CORP
Inventor: FLING RUSSELL THOMAS
Abstract: In processing comb filtered video signals it is desirable to separate lower frequency vertical detail signal from comb filtered chrominance and recombine it with the comb filtered luminance signal. System response is enhanced if the vertical detail is non-linear processed before it is recombined with luminance. To core, peak and pare digital vertical detail signal, the signal is passed through an absolute value circuit and then applied to a first signal combiner wherein a first reference value is subtracted from the magnitudes of the input signals. The differences are applied to a polarity discriminator which passes difference values of only one polarity. The one polarity differences are scaled and applied to one input port of a signal combining circuit. The one polarity differences are also applied to a third signal combining circuit wherein a second reference value is subtracted from the one polarity differences to produce a double difference value. The double difference value is applied to a second polarity discriminator which couples one polarity double difference values to a second input port of the second signal combining circuit, the output of which exhibits a piecewise linear, non-linear transfer characteristic.
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公开(公告)号:GB2140636A
公开(公告)日:1984-11-28
申请号:GB8412561
申请日:1984-05-17
Applicant: RCA CORP
Inventor: WILLIS DONALD HENRY , FLING RUSSELL THOMAS
Abstract: Digital representations of analog signals are limited in resolution accuracy by the number of bits in the digital output signal of an analog-to-digital converter which limits the number of analog output levels produceable by a digital-to-analog converter. The apparent resolution accuracy can be improved, however, by the addition of two "dithering" signals, one at a lower frequency and one at a higher frequency, to increase the number of transitions of the least significant bit (LSB) of the digital signals. In a television receiver employing digital signal processing apparatus, dither signals having magnitudes equivalent to 1/2 and 1/4 LSB and at frequencies related to the TV line frequency and the color subcarrier frequency are preferred.
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公开(公告)号:IT8420925D0
公开(公告)日:1984-05-15
申请号:IT2092584
申请日:1984-05-15
Applicant: RCA CORP
Inventor: FLING RUSSELL THOMAS , NAIMPALLY SAIPRASAD VASUDEV
Abstract: Symmetrical truncation of two's complement binary numbers is performed by simply discarding the LSB's of positive values and by adding "one" to the truncated negative value when any one of the discarded LSB's is a logical "one" value. Apparatus to perform an N bit truncation includes an incrementer, a two input AND gate and an N-input OR gate.
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公开(公告)号:HK33694A
公开(公告)日:1994-04-22
申请号:HK33694
申请日:1994-04-14
Applicant: RCA CORP
Inventor: FLING RUSSELL THOMAS
Abstract: A video signal recursive filter includes circuitry for controlling the integration time of the filter. The control circuitry develop a motion-threshold value responsive to the noise content of signal differences developed by subtracting a processed signal, delayed by a frame period, from an incoming video signal. The signal differences are compared against the motion threshold to develop motion signals indicating the history of image motion for each picture element. Circuitry responsive to the signal noise content develops a signal which is coupled to the motion signals to form address codewords that are applied to a ROM programmed with predetermined control signals for establishing the integration time of the recursive filter.
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公开(公告)号:GB2182522B
公开(公告)日:1989-09-27
申请号:GB8625893
申请日:1986-10-29
Applicant: RCA CORP , RCA LICENSING CORP
Inventor: FLING RUSSELL THOMAS
Abstract: A picture-in-picture television receiver for which the viewer may change the size of the inset image includes an adaptive anti-aliasing filter. Composite video signals which produce the inset image are applied to a separation filter which attenuates the chrominance components to provide separated luminance signals. The luminance signals are applied to a second filter which includes a variable delay element and an adder. The luminance signals are applied to one input port of the adder and to the delay element. The signals provided by the delay element are applied to the second input port of the adder. The delay element provides time delays which may be expressed by the equation T=K2 tau +PK1 tau where tau is a fixed amount of time, K1 and K2 are constants and P is a variable. The frequency response characteristic of the filter is changed by changing the value of P.
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公开(公告)号:GB2178624B
公开(公告)日:1989-08-16
申请号:GB8618180
申请日:1986-07-25
Applicant: RCA CORP , RCA LICENSING CORP
Inventor: WILLIS DONALD HENRY , FLING RUSSELL THOMAS , CHRISTOPHER TODD J
Abstract: In memory-based video signal processing systems such as frame recursive filters, for example, system performance is dependent upon critical timing relationships between incoming signals and delayed signals produced from the memory. Video signal from various sources, e.g. VTR's, tend to have jittering time bases that generally have prevented the use of such memory-based processing systems. The jittering signals may be standardized, in sampled data format, by effecting adaptive signal delays responsive to a measure of the relative phase of the sampling clock with respect to horizontal synchronizing pulses. The phase measure is used to control an interpolator which combines successive samples in proportions to develop sample values that should have occurred at the sample times had the signal not been jittering.
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公开(公告)号:AU578352B2
公开(公告)日:1988-10-20
申请号:AU5481086
申请日:1986-03-18
Applicant: RCA CORP
Inventor: FLING RUSSELL THOMAS
Abstract: A scaling circuit for scaling PCM signals by factors less than one includes a bit-shift and truncating circuit (61). Roundoff error compensating circuitry adds (60) an offset value - (38)to the samples (15) to be scaled by the bit-shift circuitry to compensate for errors produced by truncation without rounding. The offset values may be dithered to increase the apparent resolution of the system.
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公开(公告)号:GB2182522A
公开(公告)日:1987-05-13
申请号:GB8625893
申请日:1986-10-29
Applicant: RCA CORP
Inventor: FLING RUSSELL THOMAS
Abstract: A picture-in-picture television receiver for which the viewer may change the size of the inset image includes an adaptive anti-aliasing filter. Composite video signals which produce the inset image are applied to a separation filter which attenuates the chrominance components to provide separated luminance signals. The luminance signals are applied to a second filter which includes a variable delay element and an adder. The luminance signals are applied to one input port of the adder and to the delay element. The signals provided by the delay element are applied to the second input port of the adder. The delay element provides time delays which may be expressed by the equation T=K2 tau +PK1 tau where tau is a fixed amount of time, K1 and K2 are constants and P is a variable. The frequency response characteristic of the filter is changed by changing the value of P.
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