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公开(公告)号：WO1982003725A1
公开(公告)日：1982-10-28
申请号：PCT/US1982000476
申请日：1982-04-16
Applicant: RCA CORP
Inventor： RCA CORP , WILLIS DONALD HENRY
IPC: H01J29/70
CPC classification number: H04N3/185
Abstract: L'enroulement principal (22a, 22b) d'un transformateur d'inductance (22) a perte elevee est couple a une source (19) de tension d'entree (Vp) de courant alternatif pour developper des tensions de sortie de polarite alternee dans des enroulements secondaires couples etroitement les uns aux autres, comprenant un enroulement de haute tension (22c) du transformateur. Plusieurs tensions d'alimentation en courant continu, comprenant la tension d'anode acceleratrice (30KV), sont derivees a partir des tensions de sortie de l'enroulement secondaire. Afin de reguler les tensions de sortie de l'enroulement secondaire, un circuit comprenant un condensateur (23) et une reactance saturable (21) est couple en tant que circuit de charge (20) a un (22F) des enroulements secondaires du transformateur. Lorsque la reactance saturable (21) est magnetiquement saturee pendant chaque demi-cycle de la tension de sortie a polarite alternee, un courant circulant (ic) est produit et s'ecoule entre la reactance saturable (21) et le condensateur (23). Afin d'ameliorer le rendement de l'alimentation de courant et de reduire l'augmentation de temperature a l'interieur du noyau magnetisable (121) de la reactance saturable (21), les parametres du transformateur (22) et du circuit de charge (20) sont selectionnes de maniere a produire un courant circulant possedant une amplitude relativement faible. Afin d'ameliorer la regulation de la tension de sortie lors de la production d'un courant circulant possedant une faible amplitude, on prevoit un enroulement d'attaque de compensation (22g) couple magnetiquement et etroitement au premier enroulement (22a, 22b) du transformateur a fuite elevee (22). L'enroulement d'attaque de compensation (22g) est couple en serie a l'enroulement (21a) de la reactance saturable au travers du condensateur (23) et est polarise par rapport a l'enroulement secondaire (22f) du transformateur couple par condensateur de maniere a s'opposer a la tendance de l'amplitude de la tension de sortie ou de la region volt-seconde de
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2.发明申请TELEVISION RECEIVER SATURATING CORE REGULATED POWER SUPPLY WITH PERMANENT MAGNET BIASING 审中-公开电视接收机使用永久磁铁偏置调节芯片调节电源
公开(公告)号：WO1982004348A1
公开(公告)日：1982-12-09
申请号：PCT/US1982000720
申请日：1982-05-26
Applicant: RCA CORP
Inventor： RCA CORP , WILLIS DONALD HENRY , CLAYBURN RANDALL CROSS
IPC: H01F17/04
CPC classification number: H04N3/185
Abstract: Une alimentation de puissance a noyau de saturation (17) pour un recepteur de television comprend un reacteur saturable (SR1) ayant un noyau magnetisable (21) et un enroulement (20) situe sur celui-ci. Un courant d'excitation pour le reacteur saturable est developpe a partir d'une source (26) ayant une tension d'entree non regulee. Un flux magnetique est genere dans le noyau magnetisable qui enchaine l'enroulement du reacteur pour developper une tension de sortie a polarite alternative. Un condensateur (c) developpe un courant de circulation qui genere une force de magnetisation dans une section de noyau associee a l'enroulement du reacteur. Un aimant permanent (22) polarise le noyau (21) pour produire une seconde force de magnetisation dans la section de noyau associee. La resultante des deux forces de magnetisation developpe un flux magnetique qui sature sensiblement le materiau magnetisable de la section de noyau associee pendant chaque cycle de la tension de sortie de polarite alternative pour reguler la tension de sortie. La stabilite de la temperature de la tension de sortie sensible a la temperature est obtenue par la resistance de polarisation commandee par la temperature de l'aimant permanent (22).
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公开(公告)号：US3906304A
公开(公告)日：1975-09-16
申请号：US43832374
申请日：1974-01-31
Applicant: RCA CORP
Inventor： WILLIS DONALD HENRY
CPC classification number: H04N3/20
Abstract: A horizontal deflection system driven auxiliary supply for a television receiver has as a rectifying device an integrated thyristor-rectifier (ITR). When the deflection system is operating under normal conditions, the rectifier portion of the ITR provides direct operating current through conventional filter circuitry to other receiver circuits, such as the vertical deflection system, whose performance is essential to the production of a viewable display. When the horizontal deflection system generates excessive voltage which results in an undesirable increase in the picture tube anode voltage derived from the deflection system, the peak cathode voltage of the rectifier portion, and thus the peak anode voltage of the thyristor portion of the ITR, rises. When the anode of the thyristor goes sufficiently positive with respect to its cathode, the voltage drop across the thyristor exceeds its breakover voltage and the thyristor begins to conduct heavily, removing the operating current from the other receiver circuits and rendering the display unviewable.
Abstract translation: 用于电视接收机的水平偏转系统驱动辅助电源具有集成晶闸管整流器（ITR）作为整流装置。 当偏转系统在正常条件下运行时，ITR的整流器部分通过常规滤波器电路提供直接工作电流到其它接收器电路，例如垂直偏转系统，其垂直偏转系统的性能对于可视显示器的生产至关重要。 当水平偏转系统产生过大的电压，这导致从偏转系统导出的显像管阳极电压不期望的增加时，整流部分的峰值阴极电压以及因此ITR的晶闸管部分的峰值阳极电压上升 。 当晶闸管的阳极相对于其阴极达到足够的正电压时，晶闸管两端的电压降超过其转折电压，并且晶闸管开始剧烈地导通，从其他接收器电路中去除工作电流，并使显示器看不见。
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公开(公告)号：US3619488A
公开(公告)日：1971-11-09
申请号：US3619488D
申请日：1970-05-15
Applicant: RCA CORP
Inventor： WILLIS DONALD HENRY
CPC classification number: H04N9/67
Abstract: A video amplifier, for driving a kinescope, employs two transistors of opposite conductivity arranged in a series path and further having their emitter electrodes coupled together. The amplifier is biased stabilized by a third transistor having the collector electrode coupled to the emitter connection of the two transistors and having a capacitor coupled between the collector and base electrodes. The emitter electrode of the third transistor is returned to a source of reference potential. A unidirectional current conducting device is coupled between the base electrode of the third transistor and the collector electrode of one of the series transistors. The unidirectional device is caused to conduct a signal applied thereto and occurring during a repetitive interval, to charge the capacitor to a level determined in accordance with the quiescent voltage at the collector of said one series transistor. This level and the magnitude of said capacitor is sufficient to cause the third transistor to also conduct for the absence of said signal. This maintains the collector current of said one series transistor at the value necessary to regulate the potential at the collector electrode thereof. A further transistor stage provides peaking, contrast control and blanking functions for the video amplifier, as described above, by operating on the luminance component of the composite signal for application thereto to the base electrode of the other one of said series transistors.
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Patent Agency Ranking
公开(公告)号：JPS6257377A
公开(公告)日：1987-03-13
申请号：JP20526386
申请日：1986-09-02
Applicant: RCA CORP
Inventor： CHRISTOPHER TODD J , WILLIS DONALD HENRY , FLING RUSSELL THOMAS
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公开(公告)号：JPS6337778A
公开(公告)日：1988-02-18
申请号：JP17977586
申请日：1986-07-29
Applicant: RCA CORP
Inventor： WILLIS DONALD HENRY
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公开(公告)号：JPS61502442A
公开(公告)日：1986-10-23
申请号：JP50284585
申请日：1985-06-10
Applicant: RCA CORP
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公开(公告)号：FR2585913B1
公开(公告)日：1992-01-24
申请号：FR8611064
申请日：1986-07-30
Applicant: RCA CORP
Inventor： WILLIS DONALD HENRY , FLING RUSSEL THOMAS , CHRISTOPHER TODD J
Abstract: In memory-based video signal processing systems such as frame recursive filters, for example, system performance is dependent upon critical timing relationships between incoming signals and delayed signals produced from the memory. Video signal from various sources, e.g. VTR's, tend to have jittering time bases that generally have prevented the use of such memory-based processing systems. The jittering signals may be standardized, in sampled data format, by effecting adaptive signal delays responsive to a measure of the relative phase of the sampling clock with respect to horizontal synchronizing pulses. The phase measure is used to control an interpolator which combines successive samples in proportions to develop sample values that should have occurred at the sample times had the signal not been jittering.
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公开(公告)号：FR2585203B1
公开(公告)日：1990-03-16
申请号：FR8610358
申请日：1986-07-16
Applicant: RCA CORP
Inventor： WILLIS DONALD HENRY
Abstract: A digital sample rate reduction apparatus receives an input signal occurring at a given sample rate and produces an output signal occurring at a rate which is two-thirds the input sample rate. One half of the output samples are interpolated samples and the other half are original input samples.
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