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公开(公告)号：JPS6257377A
公开(公告)日：1987-03-13
申请号：JP20526386
申请日：1986-09-02
Applicant: RCA CORP
Inventor： CHRISTOPHER TODD J , WILLIS DONALD HENRY , FLING RUSSELL THOMAS
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公开(公告)号：JPS6231288A
公开(公告)日：1987-02-10
申请号：JP18121086
申请日：1986-07-30
Applicant: RCA CORP
Inventor： FLING RUSSELL THOMAS
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公开(公告)号：GB2173066B
公开(公告)日：1989-04-05
申请号：GB8606760
申请日：1986-03-19
Applicant: RCA CORP
Inventor： FLING RUSSELL THOMAS
Abstract: A video signal recursive filter includes circuitry for controlling the integration time of the filter. The control circuitry develop a motion-threshold value responsive to the noise content of signal differences developed by subtracting a processed signal, delayed by a frame period, from an incoming video signal. The signal differences are compared against the motion threshold to develop motion signals indicating the history of image motion for each picture element. Circuitry responsive to the signal noise content develops a signal which is coupled to the motion signals to form address codewords that are applied to a ROM programmed with predetermined control signals for establishing the integration time of the recursive filter.
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公开(公告)号：GB2194118A
公开(公告)日：1988-02-24
申请号：GB8719267
申请日：1987-08-14
Applicant: RCA CORP
Inventor： FLING RUSSELL THOMAS
Abstract: In processing comb filtered video signals it is desirable to separate lower frequency vertical detail signal from comb filtered chrominance and recombine it with the comb filtered luminance signal. System response is enhanced if the vertical detail is non-linear processed before it is recombined with luminance. To core, peak and pare digital vertical detail signal, the signal is passed through an absolute value circuit and then applied to a first signal combiner wherein a first reference value is subtracted from the magnitudes of the input signals. The differences are applied to a polarity discriminator which passes difference values of only one polarity. The one polarity differences are scaled and applied to one input port of a signal combining circuit. The one polarity differences are also applied to a third signal combining circuit wherein a second reference value is subtracted from the one polarity differences to produce a double difference value. The double difference value is applied to a second polarity discriminator which couples one polarity double difference values to a second input port of the second signal combining circuit, the output of which exhibits a piecewise linear, non-linear transfer characteristic.
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Patent Agency Ranking
公开(公告)号：DE3625933A1
公开(公告)日：1987-02-12
申请号：DE3625933
申请日：1986-07-31
Applicant: RCA CORP
Inventor： WILLIS DONALD HENRY , FLING RUSSELL THOMAS , CHRISTOPHER TODD J
Abstract: A speed-up memory doubles the field rate of a video input signal by repeating each field to reduce flicker when the double field rate signal is displayed. Read/write clocks for controlling the memory are locked to the color subcarrier of the video input signal thereby tending to produce visual artifacts in the displayed image due to clock skew relative to sync when non-standard video signals are processed. The skew errors are corrected by circuitry which measures the skew of the read and write clocks and delays the video signal as a function of a difference between the clock skew measurements.
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公开(公告)号：ZA8602178B
公开(公告)日：1986-11-26
申请号：ZA8602178
申请日：1986-03-24
Applicant: RCA CORP
Inventor： FLING RUSSELL THOMAS
CPC classification number: H03H17/0461 , G06F7/48 , G06F7/49947
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公开(公告)号：AU5674386A
公开(公告)日：1986-11-06
申请号：AU5674386
申请日：1986-04-24
Applicant: RCA CORP
Inventor： WILLIS RONALD HENRY , FLING RUSSELL THOMAS
Abstract: A speed-up memory converts interlaced RGB input signals to double line-rate (progressive scan) form. A vertical detail signal is derived from the RGB input signals before or after speed-up and a vertical peaking signal is derived from the detail signal. During the first read operation of the speed-up memory both signals are added to the speeded-up signals to effect a preshoot of the resultant signal and during the second speed-up memory read operation only the peaking signal added to affect an overshoot of the resultant signals whereby alternate lines of the converted RGB signals exhibit enhanced vertical detail.
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公开(公告)号：FI861705A
公开(公告)日：1986-10-31
申请号：FI861705
申请日：1986-04-23
Applicant: RCA CORP
Inventor： WILLIS DONALD HENRY , FLING RUSSELL THOMAS
Abstract: A speed-up memory converts interlaced RGB input signals to double line-rate (progressive scan) form. A vertical detail signal is derived from the RGB input signals before or after speed-up and a vertical peaking signal is derived from the detail signal. During the first read operation of the speed-up memory both signals are added to the speeded-up signals to effect a preshoot of the resultant signal and during the second speed-up memory read operation only the peaking signal added to affect an overshoot of the resultant signals whereby alternate lines of the converted RGB signals exhibit enhanced vertical detail.
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公开(公告)号：DE3609887A1
公开(公告)日：1986-09-25
申请号：DE3609887
申请日：1986-03-24
Applicant: RCA CORP
Inventor： FLING RUSSELL THOMAS
Abstract: A video signal recursive filter includes circuitry for controlling the integration time of the filter. The control circuitry develop a motion-threshold value responsive to the noise content of signal differences developed by subtracting a processed signal, delayed by a frame period, from an incoming video signal. The signal differences are compared against the motion threshold to develop motion signals indicating the history of image motion for each picture element. Circuitry responsive to the signal noise content develops a signal which is coupled to the motion signals to form address codewords that are applied to a ROM programmed with predetermined control signals for establishing the integration time of the recursive filter.
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