公开(公告)号：DE3888885D1

公开(公告)日：1994-05-11

申请号：DE3888885

申请日：1988-01-29

Applicant: SONY CORP

Inventor： HAYASHI HISAO ,  MATSUSHITA TAKESHI

IPC: H01L27/00 ,  H01L21/02 ,  H01L21/336 ,  H01L21/768 ,  H01L21/8234 ,  H01L23/528 ,  H01L27/088 ,  H01L27/12 ,  H01L29/78 ,  H01L29/786 ,  H01L21/90 ,  H01L23/52

Abstract: On an n-type single-crystal silicon base (21), an insulating layer (22), a gate electrode (5), another insulating layer (2) and a middle layer (23) are formed using the CVD method. After polishing the top layer down to a flat surface (q), another insulating layer (44) and a silicon substrate (1) are formed, whichmakewhich makes a supporting body (11). The other side of the semiconductor layer (21) is then polished down (6), on top of which formed are o another insulating layer (24), another gate electrode (26), a soruce region (27), a drain region (28), another insulating layer (29), a source electrode (31) and a drain electrode (32). These electrodes (31,32) form a part of a second layer (6) as opposed to a first wiring layer (5) consisting of the gate electrode.

公开(公告)号：GB2263018A

公开(公告)日：1993-07-07

申请号：GB9301223

申请日：1992-03-20

Applicant: SONY CORP

Inventor： HASHIMOTO MAKOTO ,  MIYAZAWA YOSHIHIRO ,  MATSUSHITA TAKESHI

IPC: H01L27/11

Abstract: A static random access memory comprises a semiconductor device wherein a conductive layer (33) is separated from a semiconductor layer (35), which has semiconductor elements (35a, 35b) formed therein, by an insulator film (34). The conductive layer (33) is connected to the semiconductor elements (35a, 35b) via contact holes (36) in the insulator film (34), thereby forming a wiring arrangement. The wiring layer extends over the entire surface and provides a low resistance power supply wiring to the memory cells.

公开(公告)号：DE4209364A1

公开(公告)日：1992-10-22

申请号：DE4209364

申请日：1992-03-23

Applicant: SONY CORP

Inventor： HASHIMOTO MAKOTO ,  MIYAZAWA YOSHIHIRO ,  MATSUSHITA TAKESHI

IPC: H01L27/11

Abstract: A method for manufacture of a full CMOS type SRAM, comprising the steps of forming a first mask layer on a semiconductor layer, and patterning the first mask layer by photolithography to form semiconductor island layers where a driver MOS transistor and a load MOS transistor are formable with a slight space therebetween; forming a second mask layer on the semiconductor layer, and patterning the second mask layer by photolithography in such a manner as to overlap the region with one of the driver and load MOS transistors, but not to overlap the isolating region between the transistors; masking, with a resist film, the region with the other of the driver and load MOS transistors, and etching the first mask layer while masking the same with the resist film and the second mask layer; and etching the semiconductor layer while masking the same with the first mask layer, thereby forming mutually isolated semiconductor island layers where the driver and load MOS transistors are formed respectively. According to this method, the width of each transistor and the space between the transistors can be minimized to consequently achieve an enhanced integration density.

公开(公告)号：DK142758B

公开(公告)日：1981-01-12

申请号：DK480275

申请日：1975-10-24

Applicant: SONY CORP

Inventor： MATSUSHITA TAKESHI ,  HAYASHI HISAO ,  AOKI TERUAKI ,  MOCHIZUKI HIDENOBU

IPC: H01L21/322 ,  H01L21/314 ,  H01L21/331 ,  H01L21/8247 ,  H01L23/31 ,  H01L29/06 ,  H01L29/73 ,  H01L29/78 ,  H01L29/788 ,  H01L29/792 ,  H01L29/861 ,  H01L21/31

Abstract: A semiconductive device is provided which includes a single crystal substrate. A first insulating layer arranged on one surface of the substrate is of polycrystalline silicon containing oxygen. A second insulating layer formed on the first insulating layer is of polycrystalline silicon containing one of a group consisting of nitrogen, Si3N4, Al2O3 and silicone resin. The substrate includes at least one PN junction which extends to the said surface of the substrate. A novel method of making is also disclosed.

公开(公告)号：CA1075373A

公开(公告)日：1980-04-08

申请号：CA251094

申请日：1976-04-27

Applicant: SONY CORP

Inventor： MATSUSHITA TAKESHI ,  HAYASHI HISAO ,  SHIBASAKI MITSURU

IPC: H01L21/00 ,  H01L21/205 ,  H01L21/314 ,  H01L21/316 ,  H01L21/331 ,  H01L21/337 ,  H01L23/29 ,  H01L23/31 ,  H01L27/06 ,  H01L29/04 ,  H01L29/10 ,  H01L29/16 ,  H01L29/165 ,  H01L29/43 ,  H01L29/45 ,  H01L29/73 ,  H01L29/737 ,  H01L29/80 ,  H01L29/808 ,  H01L27/04 ,  H01L21/22

Abstract: A semiconductor device comprising a silicon substrate with an oxygen doped polycrystalline or amorphous silicon layer formed on the substrate so as to form a hetero junction therewith. A transistor formed according to the invention has an emitter-base hetero junction and has a high current gain.

公开(公告)号：DE2838545A1

公开(公告)日：1980-03-20

申请号：DE2838545

申请日：1978-09-04

Applicant: SONY CORP

Inventor： MATSUSHITA TAKESHI ,  HAYASHI HISAO ,  MAMINE TAKAYOSHI ,  NISHIYAMA KAZUO

IPC: H01L21/22 ,  H01L29/167 ,  H01L21/265

Abstract: A method of an iron Fe ion implantation into a semiconductor substrate of an N-type conductivity is disclosed. The method comprises the steps of implanting Fe ions into an N-type semiconductor substrate from its one surface with the dose amount of 1010 to 1015 cm-2 and heat-treating the semiconductor substrate with Fe ions at 850 DEG to 1250 DEG C. to control the lifetime of the minority carrier in the substrate and hence to reduce the temperature dependency of the lifetime.

公开(公告)号：CA1050646A

公开(公告)日：1979-03-13

申请号：CA237854

申请日：1975-10-17

Applicant: SONY CORP

Inventor： MATSUSHITA TAKESHI ,  MAMINE TAKAYOSHI

IPC: H01L31/04 ,  H01L31/06 ,  H01L31/068 ,  H01L31/0687 ,  H01L31/10

Abstract: MULTI-LAYER SEMICONDUCTOR PHOTOVOLTAIC DEVICE A semiconductor photovoltaic device is comprised of 2n layers of alternating p-type and n-type material having respective PN junctions between adjacent layers, wherein n is an integer greater than 1. Each layer has a thickness which is less than the diffusion length of a minority carrier therein. The PN junctions are excited by light which is incident on the device to thereby cause majority carriers to be accumulated in the respective layers so as to forward bias all of the PN junctions. As a result of the forward biasing of the PN junctions, transistor action occurs in each set of three successive layers, so that a carrier is injected from a first of these successive layers into the next adjacent layer and thence into the following successive layer so as to support a current therethrough. The photovoltaic device thus is adapted to supply a voltage and a current to a load.

公开(公告)号：AU8535675A

公开(公告)日：1977-04-07

申请号：AU8535675

申请日：1975-10-01

Applicant: SONY CORP

Inventor： MAMINE TAKAYOSHI ,  MATSUSHITA TAKESHI

IPC: H01L31/04 ,  G02B1/11 ,  G02B1/113 ,  H01L21/314 ,  H01L31/02 ,  H01L31/0216 ,  H01L31/068 ,  H01L31/10 ,  H01L31/18

Abstract: A polycrystalline silicon layer provides an antireflective coating on a semiconductor surface of a photo-sensitive detector, the polycrystalline silicon layer containing from 25 to 45 atomic percent of oxygen and having a refractive index intermediate that of the semiconductor crystal and the exterior environment.

公开(公告)号：DE2618734A1

公开(公告)日：1976-11-11

申请号：DE2618734

申请日：1976-04-28

Applicant: SONY CORP

Inventor： AOKI TERUAKI ,  MATSUSHITA TAKESHI ,  KAWANA YOSHIYUKI

IPC: H01L29/78 ,  H01L21/00 ,  H01L21/283 ,  H01L21/329 ,  H01L21/331 ,  H01L21/763 ,  H01L23/29 ,  H01L29/73 ,  H01L23/30

公开(公告)号：DE2618733A1

公开(公告)日：1976-11-11

申请号：DE2618733

申请日：1976-04-28

Applicant: SONY CORP

Inventor： MATSUSHITA TAKESHI ,  HAYASHI HISAO ,  SHIBAZAKI MITSURU

IPC: H01L21/00 ,  H01L21/205 ,  H01L21/314 ,  H01L21/316 ,  H01L21/331 ,  H01L21/337 ,  H01L23/29 ,  H01L23/31 ,  H01L27/06 ,  H01L29/04 ,  H01L29/10 ,  H01L29/16 ,  H01L29/165 ,  H01L29/43 ,  H01L29/45 ,  H01L29/73 ,  H01L29/737 ,  H01L29/80 ,  H01L29/808 ,  H01L29/72