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公开(公告)号：AU2004292018B2
公开(公告)日：2010-11-11
申请号：AU2004292018
申请日：2004-11-19
Applicant: ATI TECHNOLOGIES INC
Inventor： GRUBER ANDY , LEFEBVRE LAURENT , SKENDE ANDI , MOREIN STEVEN
Abstract: A graphics processor, comprising an arbiter circuit having vertex data provided at a first input and pixel data provided at a second input, wherein arbiter circuit is configured to select to transmit the vertex data at the first input or the pixel data at the second input; and a unified shader coupled to the arbiter circuit, wherein the unified shader is configured to simultaneously perform the vertex operations and the pixel operations on the vertex data and the pixel data by switching between the vertex operations and the pixel operations, and the unified shader comprises: a register block coupled to the arbiter circuit configured to maintain the vertex data and the pixel data in the unified shader, a processor unit coupled to the register block, wherein the processor unit is configured to execute vertex operations and pixel operations, and a sequencer coupled to the processor unit and the register block, wherein the sequencer is operative to cause the processor unit to execute the vertex operations and the pixel operations on the vertex data and the pixel data.
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公开(公告)号：DE602005010810D1
公开(公告)日：2008-12-18
申请号：DE602005010810
申请日：2005-11-02
Applicant: ATI TECHNOLOGIES INC
Inventor： AHMAD SAGHEER , SCOTT ERIC , MACRI JOSEPH , SHIMIZU DAN
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公开(公告)号：DE69934465T2
公开(公告)日：2007-09-27
申请号：DE69934465
申请日：1999-09-14
Applicant: ATI TECHNOLOGIES INC , ATI INT SRL
Inventor： RAKIB SELIM SHLOMO , BERNSTEIN ZVI
Abstract: A method and apparatus for interleaving symbols from a one dimensional TDMA 802.14 or MCNS minislot or other TDMA stream into two dimensional arrays in code and time for transmission on a code division multiplexed digital data transmission system. There are two methods disclosed. The first calculates i and j values for storage in RAM as a function of the symbol index in the TDMA stream, the number of codes to be employed, the column space design parameter representing the number of columns in the array, i.e., symbol times, that could be adversely affected by burst noise, and a calculated total number of columns in the array. The result is an array in which no indices of two symbols within any column or between columns of the column space are closer together than a design parameter vertical distance. The other method is similar but interleaves on both a column space as well as a row space so as to spread out the effects of both burst noise and intercode interference so that any errors that result are within the range of the redundant ECC bits to detect and correct.
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公开(公告)号：HK1099111A1
公开(公告)日：2007-08-03
申请号：HK07103641
申请日：2007-04-04
Applicant: ATI TECHNOLOGIES INC
Inventor： MOREIN STEVEN , LEFEBVRE LAURENT , GRUBER ANDY , SKENDE ANDI
Abstract: A graphics processor, comprising an arbiter circuit having vertex data provided at a first input and pixel data provided at a second input, wherein arbiter circuit is configured to select to transmit the vertex data at the first input or the pixel data at the second input; and a unified shader coupled to the arbiter circuit, wherein the unified shader is configured to simultaneously perform the vertex operations and the pixel operations on the vertex data and the pixel data by switching between the vertex operations and the pixel operations, and the unified shader comprises: a register block coupled to the arbiter circuit configured to maintain the vertex data and the pixel data in the unified shader, a processor unit coupled to the register block, wherein the processor unit is configured to execute vertex operations and pixel operations, and a sequencer coupled to the processor unit and the register block, wherein the sequencer is operative to cause the processor unit to execute the vertex operations and the pixel operations on the vertex data and the pixel data.
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公开(公告)号：DE60034511D1
公开(公告)日：2007-06-06
申请号：DE60034511
申请日：2000-06-21
Applicant: ATI TECHNOLOGIES INC , ATI INT SRL
Inventor： GRIMWOOD MICHAEL , LIND PAUL ALAN , RAKIB SELIM SHLOMO
Abstract: A method for allowing upstream channels having the same multiplexing type but different symbol rates or the same symbol rates but different multiplexing types to be transmitted on the same frequency band without interfering with each other. In particular, a method for allowing DOCSIS 1.0 TDMA only cable modems to coexist on a digital data delivery distributed system with DOCSIS 1.2 TDMA or SCDMA mode cable modems without the need for modification of the DOCSIS 1.0 cable modems or the need for the DOCSIS 1.0 modems to transmit on a different frequency. The method comprises: using a plurality of upstream channel descriptor messages transmitted from said central modem to said distributed modems to define a plurality of different upstream logical channels sharing the same frequency band, each said logical channel having either a different symbol rate but the same multiplexing type or the same multiplexing type but a different symbol rate, said upstream channel descriptor messages assigning each of said distributed modems to logical channels appropriate to the symbol rate and modulation type of said distributed modem; and, scheduling transmission bursts on each said logical channel by transmitting a bandwidth award and scheduling message for each logical channel each of which defines and controls which distributed modems on the logical channel to which the bandwidth award and scheduling message can transmit and when they can transmit, said bandwidth award and scheduling messages being coordinated by said central modem so that there is never any overlap in time between transmission bursts on different logical channels sharing the same frequency band.
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Patent Agency Ranking
公开(公告)号：CA2214221C
公开(公告)日：2000-06-06
申请号：CA2214221
申请日：1997-08-28
Applicant: ATI TECHNOLOGIES INC
Inventor： CHOW HUGH , AHDAB AHMAD , CHAU RAYMOND
Abstract: A voltage controlled oscillator comprising: a ring of inverters comprised of an odd number of serially connected CMOS inverter stages, the inverter stages being connected between first and second oppositely poled power leads, a MOSFET having a source-drain circuit connected between one of the power leads and a first power rail, the other power lead being connected to a second power rail, apparatus for operating the MOSFET in saturation, and apparatus for applying a control voltage to the gate of the MOSFET, referenced to the second power lead, whereby the MOSFET operates as a nonlinear current conduction device having a characteristic such as to linearize the voltage-frequency characteristic of the combined MOSFET - ring oscillator combination.
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公开(公告)号：CA2140962C
公开(公告)日：1998-09-29
申请号：CA2140962
申请日：1995-01-24
Applicant: ATI TECHNOLOGIES INC
Inventor： DEGROOF STEVEN L
IPC: G02B30/25 , H04N13/00 , G02B27/26 , G02F1/1333
Abstract: A stereoscopic display is comprised of a pair of display apparatus having faces mutually oriented between approximately 90 apparatus for polarizing light from images displayed on the respective display apparatus, light from one image being polarized orthogonally to the light from the other image, a semitransparent mirror disposed between and approximately bisecting the angle between the pair of display apparatus for transmitting light from an image displayed on one display apparatus and reflecting light from an image displayed on the other display apparatus, toward a viewing position.
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公开(公告)号：CA2214221A1
公开(公告)日：1998-08-24
申请号：CA2214221
申请日：1997-08-28
Applicant: ATI TECHNOLOGIES INC
Inventor： AHDAB AHMAD , CHOW HUGH , CHAU RAYMOND
Abstract: A voltage controlled oscillator comprising: a ring of inverters comprised of an odd number of serially connected CMOS inverter stages, the inverter stages being connected between first and second oppositely poled power leads, a MOSFET having a source-drain circuit connected between one of the power leads and a first power rail, the other power lead being connected to a second power rail, apparatus for operating the MOSFET in saturation, and apparatus for applying a control voltage to the gate of the MOSFET, referenced to the second power lead, whereby the MOSFET operates as a nonlinear current conduction device having a characteristic such as to linearize the voltage-frequency characteristic of the combined MOSFET-ring oscillator combination.
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公开(公告)号：CA2102032C
公开(公告)日：1998-05-12
申请号：CA2102032
申请日：1993-10-29
Applicant: ATI TECHNOLOGIES INC
Inventor： LUM SANFORD S
Abstract: The present invention relates to a method of enhancing a digital color video image comprised of separating a source pixel into individual component parts, for each component part, generating a random number having the same length as the corresponding component part, adding each random number to its corresponding component part to form resultant component parts, and combining the resultant component parts to form a destination pixel.
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公开(公告)号：CA2166353A1
公开(公告)日：1996-07-01
申请号：CA2166353
申请日：1995-12-29
Applicant: ATI TECHNOLOGIES INC
Inventor： CHAU RAYMOND
Abstract: A voltage controlled oscillator comprised of a current controlled oscillator formed of a loop of serially connected inverters, the oscillator having a primary output at an output of one of the inverters for providing a primary pulse signal and a secondary output at the output of another inverter spaced from the one inverter by an odd number of inverters for providing a secondary pulse signal which is in antiphase to the primary pulse signal, apparatus for receiving the primary and secondary pulse signals and for providing an output signal which indicates the presence of a rising or falling edge to a corresponding primary or secondary pulse signal during a transmission time delay provided by the odd number of inverters.
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