公开(公告)号：EP1444784B1

公开(公告)日：2006-06-07

申请号：EP02777541.0

申请日：2002-11-13

Applicant: Renesas Technology Corp. ,  TTPCOM Limited

Inventor： KASAHARA, Masumi, c/o Hitachi, Ltd. ,  OSAWA, Hirotaka, c/o Hitachi, Ltd. ,  HENSHAW, Robert Astle, c/o TTPCOM Limited

IPC: H03L7/187 ,  H04B1/40

CPC classification number: H03L7/187 ,  H03L7/099

Abstract: In a communication semiconductor integrated circuit device, an oscillator (VCO 10) of a PLL circuit can operate in a plurality of frequency bands. With a control voltage (Vc) of the oscillator fixed to a predetermined value (VDC), an oscillation frequency of the oscillator is measured for each band to be stored in a storage (18). When the PLL operates, a setting value to specify a band is compared with the measured frequency values stored in the storage. As a result of the comparison, a band to be actually used by the oscillator is determined.

公开(公告)号：EP1650698A1

公开(公告)日：2006-04-26

申请号：EP05023055.6

申请日：2005-10-21

Applicant: SONY CORPORATION ,  Renesas Technology Corp.

Inventor： Aoki, Yoshitaka ,  Bando, Hideaki ,  Tsutsui, Keiichi ,  Nishizawa, Hirotaka ,  Ohsawa, Kenji ,  Totsuka, Takashi

IPC: G06K19/077

CPC classification number: G06K19/07732 ,  G06K19/07735 ,  G06K19/07743 ,  G06K19/07769

Abstract: In a memory card with a newly-added module for performing data communication, data communication is stably performed without receiving a noise effect. As an embodiment of the present invention, a memory card (100) has a thin-plate-shaped holding member (20), a memory section (24) provided as buried in the holding member (20), plural first connection pieces 2-10 connected to the memory section (24), a data communication section (26) provided as buried in the holding member (20), and two connection pieces(11, 12) connected to the data communication section (26). The two second connection pieces (11, 12) are disposed at the end of a row part R1 on which only the plural first connection pieces(2-10)are aligned. One first connection piece (10) positioned at the end of the row part R1 is a ground terminal. That is to say, in the plural first connection pieces (2-10), the first connection piece (10) adjacent to the second connection piece (11) is a ground terminal.

Abstract translation: 在具有用于执行数据通信的新增模块的存储卡中，数据通信稳定地执行而没有受到噪声影响。 作为本发明的一个实施例，存储卡（100）具有薄板状的保持部件（20），埋设在保持部件（20）中的存储部（24），多个第一连接片2- 10，与存储部24连接;埋入保持部件20中的数据通信部26;以及与数据通信部26连接的2个连接片11,12。 两个第二连接件（11,12）设置在仅仅多个第一连接件（2-10）对齐的行部分R1的端部处。 位于行部件R1的末端的一个第一连接件（10）是接地端子。 也就是说，在多个第一连接件（2-10）中，与第二连接件（11）相邻的第一连接件（10）是接地端子。

公开(公告)号：EP1619552A2

公开(公告)日：2006-01-25

申请号：EP04030140.0

申请日：2004-12-20

Applicant: Renesas Technology Corp.

Inventor： Yamamoto, Jiro

IPC: G03F1/16

CPC classification number: G03F1/20 ,  G03F1/68

Abstract: A method of designing a charged particle beam mask, comprises locating a plurality of identical chip patterns on a charged particle beam mask in which a plurality of subfields that can be transferred at a time are provided vertically and horizontally. The chip patterns have an arrangement pitch that is an integer multiple of the subfield.

Abstract translation: 设计一个带电粒子束掩模的方法，包括在带电粒子束掩码，其中子场的多元性也可以在同一时间内转移被垂直和水平提供定位的相同芯片图案的多个。 该芯片图案具有与间距排列所做的是子场的整数倍。

公开(公告)号：EP1608006A1

公开(公告)日：2005-12-21

申请号：EP04722958.8

申请日：2004-03-24

Applicant: ROHM CO., LTD. ,  Renesas Technology Corp. ,  HORIBA, LTD. ,  National Institute of Advanced Industrial Science and Technology

Inventor： IWAMOTO, K., c/o Rohm Co., Ltd. ,  NABATAME, T., c/o Renesas Technology Corp. ,  TOMINAGA, K., c/o Horiba, Ltd. ,  YASUDA, T., Nat. Inst.of Ad. Ind. Science & Tech.

IPC: H01L21/31

CPC classification number: H01L21/3141 ,  C23C16/45527 ,  C23C16/45529 ,  C23C16/56 ,  H01L21/3143 ,  H01L21/31616 ,  H01L21/31637 ,  H01L21/31641 ,  H01L21/31645 ,  H01L21/31691

Abstract: A metal atomic layer and an oxygen atomic layer are formed in this order by ALD, followed by rapid heating through RTA (Rapid Thermal Annealing) (202). This cycle of steps is repeated to form a high dielectric constant film.

Abstract translation: 通过ALD依次形成金属原子层和氧原子层，然后通过RTA（快速热退火）（202）快速加热。 重复该步骤循环以形成高介电常数膜。

公开(公告)号：EP1418669A3

公开(公告)日：2005-04-06

申请号：EP03023256.5

申请日：2003-10-14

Applicant: Renesas Technology Corp.

Inventor： Irie, Kiyoshi, Renesas Technology Corp. ,  Hori, Kazuaki, Renesas Technology Corp. ,  Hikasa, Kazuhiko, Renesas Technology Corp.

IPC: H03G3/30

CPC classification number: H03G1/0088 ,  H03F3/45098 ,  H03F2200/294 ,  H03F2203/45496 ,  H03F2203/45504 ,  H03F2203/45722 ,  H03G1/0023 ,  H04B1/707 ,  H04B2201/70706

Abstract: The dynamic range is changed by switching a current applied to an amplifying circuit to obtain the minimum ICP required to keep linearity with the number of multiplexes even when the number of multiplexes of data is changed by switching the operation current of the amplifying circuits of the transmission system and also supplying the information about number of multiplexes of data to be transmitted to the amplifying circuits of the transmission system from the baseband circuit. Thereby, the signal can be transmitted without distortion even when the number of multiplexes increases and the current of the amplifying circuit may be reduced when the number of multiplexes is small in order to reduce the current consumption in the communication semiconductor integrated circuit device which can form a wireless communication system of the code division multiplex system such as W-CDMA system.

公开(公告)号：EP1515269A2

公开(公告)日：2005-03-16

申请号：EP04254322.3

申请日：2004-07-19

Applicant: Renesas Technology Corp.

Inventor： Yamada, Nobuaki Renesas Technology Corp. ,  Suzuki, Kazunari Renesas Technology Corp. ,  Kuratomi, Bunshi Renesas Technology Corp. ,  Tanaka, Hiroaki Renesas Technology Corp. ,  Onozawa, Akira Renesas Technology Corp.

IPC: G06K19/077

CPC classification number: G06K19/07745 ,  G06K19/077 ,  G06K19/07718 ,  G06K19/07724 ,  G06K19/07733 ,  G06K19/07743 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48228 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/10253 ,  H01L2924/19041 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A multi-function structure of a plug-in universal IC card is to be promoted and the manufacturing cost is to be reduced. A body of the plug-in UICC is constructed of a molding resin. A tape substrate and a chip mounted on one side of the tape substrate are sealed in the interior of the molding resin. An opposite side (opposite to the chip mounting side) of the tape substrate is exposed to the exterior of the molding resin and constitutes a surface portion of the plug-in UICC. Contact patterns as external terminals of the plug-in UICC are formed on the surface of the tape substrate exposed to the exterior of the molding resin. In the plug-in UICC whose body is constructed of the molding resin, cracking of the chip can be prevented effectively even in the case where the chip is large-sized.

Abstract translation: 推动插入式通用IC卡的多功能结构，降低制造成本。 插件UICC的主体由模制树脂构成。 胶带基片和安装在带基片一侧的芯片被密封在模塑树脂的内部。 带基材的相对侧（与芯片安装侧相对）暴露于模制树脂的外部，并构成插件UICC的表面部分。 作为插入式UICC的外部端子的接触图案形成在暴露于成型树脂外部的带基材的表面上。 在其主体由模制树脂构成的插件UICC中，即使在芯片尺寸较大的情况下也可有效防止芯片的开裂。

公开(公告)号：EP1441393A3

公开(公告)日：2005-03-09

申请号：EP03016445.3

申请日：2003-07-21

Applicant: Renesas Technology Corp.

Inventor： Nitta, Tetsuya, c/o Renesas Technology Corp. ,  Terashima, Tomohide, c/o Mitsubishi Denki

IPC: H01L27/12 ,  H01L21/84 ,  H01L21/8234 ,  H01L27/088

CPC classification number: H01L21/84 ,  H01L27/1203 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An integrated semiconductor device containing semiconductor elements that have respective desired on-resistances and breakdown voltages achieves appropriate characteristics as a whole of the integrated semiconductor element. The integrated semiconductor device (50) includes a plurality of semiconductor elements (50a, 50b, 50c) formed in a semiconductor layer and each having a source (6) of an n type semiconductor, a drain (3) of the n type semiconductor and a back gate (5) of a p type semiconductor between the source and the drain. At least a predetermined part of the drain of one semiconductor element and a predetermined part of the drain of another semiconductor element have respective impurity concentrations different from each other.

公开(公告)号：EP1396815A1

公开(公告)日：2004-03-10

申请号：EP02730759.4

申请日：2002-05-29

Applicant: Renesas Technology Corp.

Inventor： MIZUSHIMA, Nagamasa, c/o Systems Development Lab. ,  TSUNEHIRO, Takashi, c/o Systems Development Lab. ,  TSUNODA, Motoyasu, c/o Systems Development Lab. ,  TANAKA, Toshio, c/o Financial Information Systems ,  KATAYAMA, Kunihiro, c/o Semiconductor & Integrated ,  KIMURA, Kouichi, c/o Systems Development Lab. ,  HATANO, Tomihisa, c/o Systems Development Lab.

IPC: G06K19/073 ,  G06F12/14

CPC classification number: G06K7/0021 ,  G06F21/602 ,  G06K7/0047 ,  G06K19/07732

Abstract: It is an object of the invention to improve security of a storage apparatus. The invention has: a flash memory chip; an IC card chip which can execute a security process (encryption, decryption, etc.); and a controller chip for controlling read/write of data from/into the flash memory chip and the IC card chip in response to a request from a host.

Abstract translation: 本发明的目的是提高存储装置的安全性。 本发明具有：闪存芯片; 可以执行安全处理（加密，解密等）的IC卡芯片; 以及控制器芯片，用于响应于来自主机的请求来控制从/向闪存芯片和IC卡芯片的数据的读/写。

公开(公告)号：EP1748380A3

公开(公告)日：2010-11-10

申请号：EP06014151.2

申请日：2006-07-07

Applicant: Sony Corporation ,  Renesas Technology Corp.

Inventor： Aoki, Yoshitaka ,  Tsutsui, Keiichi ,  Nishizawa, Hirotaka ,  Totsuka, Takashi

IPC: G06K19/077

CPC classification number: G06K19/077 ,  G06K19/07739 ,  Y10S439/945

Abstract: A card tray to be mounted to a memory card can make the memory card mountable in a card slot for memory cards conforming to standards different from those to which the memory card conforms. The card tray has a main body and a recessed mount section. The recessed mount section is formed such that the holder of a second memory card can be mounted to one of the major surfaces of the main body. A memory-card-mounted body is produced when the second memory card is mounted to the recessed mount section. The card tray is configured such that, when the first memory card is placed on the memory-card-mounted body with the left and right edges thereof aligned with each other, the contact pieces of the first memory card and the contact pieces of the second memory card have longitudinally overlapping parts and transversally overlapping parts as viewed from above.

Abstract translation: 要安装到存储卡上的卡托盘可以使存储卡安装在符合与存储卡所符合的标准不同的标准的存储卡的卡插槽中。 卡托有一个主体和一个凹入的安装部分。 凹入式安装部分形成为使得第二存储卡的支架可以安装到主体的一个主表面。 当第二存储卡安装到凹入式安装部分时，产生安装有存储卡安装体。 卡托盘被构造成使得当第一存储卡被放置在安装有存储卡的主体上并且其左边缘和右边缘彼此对齐时，第一存储卡的接触件和第二存储卡的接触件 存储卡从上面看具有纵向重叠部分和横向重叠部分。

公开(公告)号：EP1681131B1

公开(公告)日：2010-02-17

申请号：EP06005992.0

申请日：1998-12-09

Applicant: Renesas Technology Corp.

Inventor： Shimokawa, Hanae c/o Hitachi, Ltd., I.P. Group ,  Soga, Tasao c/o Hitachi, Ltd., I.P. Group ,  Okudaira, Hiroaki c/o Hitachi, Ltd., I.P. Group ,  Ishida, Toshiharu c/o Hitachi, Ltd., I.P. Group ,  Nakatsuka, Tetsuya c/o Hitachi, Ltd., I.P. Group ,  Inaba, Yoshiharu c/o Hitachi, Ltd., I.P. Group ,  Nishimura, Asao c/o Hitachi, Ltd., I.P. Group

IPC: B23K35/26 ,  H05K3/34

CPC classification number: H05K1/181 ,  B23K1/0016 ,  B23K35/004 ,  B23K35/007 ,  B23K35/262 ,  B23K2201/40 ,  H01L23/488 ,  H01L23/49811 ,  H01L23/532 ,  H01L24/29 ,  H01L2224/83101 ,  H01L2924/01322 ,  H01L2924/15747 ,  H05K3/3426 ,  H05K3/3463 ,  H05K2201/10909 ,  Y02P70/613 ,  Y10T29/49144 ,  Y10T29/49149 ,  Y10T29/49169 ,  Y10T428/12708 ,  Y10T428/12715 ,  H01L2924/00