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公开(公告)号：KR1020080022745A
公开(公告)日：2008-03-12
申请号：KR1020060086305
申请日：2006-09-07
Applicant: 삼성전자주식회사
Abstract: A method for fabricating a silicon layer using Si3H8 gas and a method for fabricating a semiconductor device by using the same are provided to increase on-current of a transistor by performing an activation process in a temperature level lower than a temperature level for processing a silicon layer. A semiconductor substrate is loaded on a chuck which is installed within a process chamber. An internal space of the process chamber is formed as a vacuum state. A doped silicon layer is formed on an upper surface of the semiconductor substrate by implanting process gas including Si3H8 gas and dopant gas into the process chamber. The semiconductor is heated at the temperature of 400 to 600 degrees centigrade. The dopant gas includes one selected from a group including PH3, AsH3, diluted PH3, diluted AsH3, B2H6, BCl3, diluted B2H6, and diluted BCl3.
Abstract translation: 提供使用Si 3 H 8气体制造硅层的方法和通过使用该方法制造半导体器件的方法，以通过在低于用于处理硅的温度水平的温度水平进行激活处理来增加晶体管的导通电流 层。 将半导体基板装载在安装在处理室内的卡盘上。 处理室的内部空间形成为真空状态。 通过将包括Si 3 H 8气体和掺杂剂气体的工艺气体注入到处理室中，在半导体衬底的上表面上形成掺杂硅层。 半导体在400至600摄氏度的温度下被加热。 掺杂剂气体包括选自包括PH3，AsH3，稀释的PH3，稀释的AsH3，B2H6，BCl3，稀释的B2H6和稀释的BCl3的组中的一种。
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公开(公告)号：KR1020070021656A
公开(公告)日：2007-02-23
申请号：KR1020050076165
申请日：2005-08-19
Applicant: 삼성전자주식회사
IPC: H01L21/8247 , H01L27/115
CPC classification number: H01L29/157 , H01L27/115 , H01L27/11521 , H01L29/42324
Abstract: 고농도로 도핑된 실리콘 박막의 형성 방법 및 이를 이용한 비휘발성 메모리 장치의 제조 방법이 개시되어 있다. 기판을 챔버 내에 로딩한다. 챔버 내부에 실리콘 소오스 가스를 공급하여 기판 상에 비정질상의 실리콘층을 형성한다. 챔버 내부에 도판트 소오스 가스를 공급하여 실리콘층 상에 도판트층을 흡착시킨다. 실리콘 소오스 가스를 공급하는 단계와 도판트 소오스 가스를 공급하는 단계를 교대로 실시하여 복수개의 실리콘층과 복수개의 도판트층으로 이루어진 실리콘 박막을 형성한다. 인(P)과 같은 도판트가 고용 한계 이상으로 도핑된 실리콘 박막을 형성할 수 있으므로, 후속의 열처리 공정에 의해 실리콘 박막 내의 도판트가 외방 확산되더라도 실리콘 박막 내의 도판트 농도를 고농도로 유지할 수 있다.
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公开(公告)号：KR1020070014407A
公开(公告)日：2007-02-01
申请号：KR1020050069022
申请日：2005-07-28
Applicant: 삼성전자주식회사
IPC: H01L21/336
CPC classification number: H01L21/28123 , H01L21/02123 , H01L29/42324
Abstract: A method for forming a gate is provided to reduce tensile stress as compared with a conventional silicon nitride layer by forming a hard mask pattern made of SiCN wherein a conductive layer is patterned by using the hard mask pattern. A gate oxide layer and a conductive layer are sequentially formed on a substrate(100). A hard mask layer is formed on the conductive layer, made of a material having lower tensile stress than that of silicon nitride. The gate oxide layer, the conductive layer and the hard mask layer are partially etched to form a gate(122) composed of a gate oxide layer pattern(116), a conductive layer pattern(118) and a hard mask pattern. The material having low tensile stress includes SiCN.
Abstract translation: 提供了一种用于形成栅极的方法，通过形成由SiCN制成的硬掩模图案，与传统的氮化硅层相比，通过使用硬掩模图案对导电层进行图案化来降低拉伸应力。 栅极氧化物层和导电层依次形成在基板（100）上。 在由氮化硅的拉伸应力低的材料制成的导电层上形成硬掩模层。 栅极氧化物层，导电层和硬掩模层被部分蚀刻以形成由栅极氧化物层图案（116），导电层图案（118）和硬掩模图案构成的栅极（122）。 具有低拉伸应力的材料包括SiCN。
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公开(公告)号：KR100652427B1
公开(公告)日：2006-12-01
申请号：KR1020050076974
申请日：2005-08-22
Applicant: 삼성전자주식회사
IPC: H01L21/20 , H01L29/788
Abstract: A conductive polysilicon thin film forming method and a semiconductor device manufacturing method using the same are provided to enhance step coverage characteristics and to minimize the thickness of the polysilicon thin film. A chemical adsorption layer is formed on a substrate by supplying simultaneously a first reactant containing halogen atoms and predetermined dopants. The first reactant is used as Si precursor. A doped Si atomic layer is formed on the resultant structure by supplying a second reactant containing H onto the chemical adsorption layer. At this time, the H of the second reactant reacts on the halogen atom of the first reactant. The first reactant contains one selected from a group consisting of SiCl4, SiHCl3, SiH2Cl2, SiH3Cl, Si2Cl6 and Si3Cl8.
Abstract translation: 提供导电多晶硅薄膜形成方法和使用该方法的半导体器件制造方法，以提高台阶覆盖特性并使多晶硅薄膜的厚度最小化。 通过同时提供含有卤素原子和预定掺杂剂的第一反应物，在衬底上形成化学吸附层。 第一反应物用作Si前体。 通过将含H的第二反应物供应到化学吸附层上，在所得结构上形成掺杂的Si原子层。 此时，第二反应物的H与第一反应物的卤素原子反应。 第一反应物含有选自SiCl4，SiHCl3，SiH2Cl2，SiH3Cl，Si2Cl6和Si3Cl8中的一种。
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公开(公告)号：KR1020060035392A
公开(公告)日：2006-04-26
申请号：KR1020040084867
申请日：2004-10-22
Applicant: 삼성전자주식회사
IPC: H01L27/108
CPC classification number: H01L21/02178 , H01L21/02181 , H01L21/3142 , H01L21/31616 , H01L21/31645 , H01L27/10814 , H01L27/10882 , H01L27/10894 , H01L28/60 , H01L28/91
Abstract: A semiconductor device includes a capacitor having a bottom electrode, a dielectric layer formed on the bottom electrode, a top electrode formed on the dielectric layer, and a contact plug having a metal that is connected with the top electrode, wherein the top electrode includes a doped poly-Si1-xGex layer and a doped polysilicon layer epitaxially deposited on the doped poly-Si1-xGex layer and the contact plug makes a contact with the doped polysilicon layer.
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Patent Agency Ranking
公开(公告)号：KR100467018B1
公开(公告)日：2005-01-24
申请号：KR1020020036487
申请日：2002-06-27
Applicant: 삼성전자주식회사
IPC: H01L21/28
CPC classification number: H01L21/76877 , H01L21/2257 , H01L21/28525 , H01L23/485 , H01L2924/0002 , H01L2924/00
Abstract: Forming a semiconductor device can include forming an insulating layer on a semiconductor substrate including a conductive region thereof, wherein the insulating layer has a contact hole therein exposing a portion of the conductive region. A polysilicon contact plug can be formed in the contact hole wherein at least a portion of the polysilicon contact plug is doped with an element having a diffusion coeffient that is less than a diffusion coefficient of phosphorus (P). Related structures are also discussed.
Abstract translation: 形成半导体器件可以包括在包括其导电区域的半导体衬底上形成绝缘层，其中绝缘层具有暴露部分导电区域的接触孔。 可以在接触孔中形成多晶硅接触插塞，其中多晶硅接触插塞的至少一部分掺杂有扩散系数小于磷（P）的扩散系数的元素。 还讨论了相关的结构。
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公开(公告)号：KR1020040050407A
公开(公告)日：2004-06-16
申请号：KR1020020078231
申请日：2002-12-10
Applicant: 삼성전자주식회사
IPC: H01L21/768
Abstract: PURPOSE: A metal line of a semiconductor device and a forming method thereof are provided to increase the contact surface between a conductive pad and a conductive pattern for reducing the contact resistance of the metal line and improving signal transmitting speed by forming the conformal conductive pad. CONSTITUTION: A metal line of a semiconductor device is provided with a semiconductor substrate(100), the first and second interlayer dielectric(72,84) sequentially deposited on the semiconductor substrate, pad contact holes(74) formed at the first interlayer dielectric, and plug contact holes(89) vertically formed on the pad contact holes at the second interlayer dielectric. The metal line further includes conductive pads(76,78) formed on the inner walls of the pad contact holes for being electrically connected with the semiconductor substrate, and contact plugs(85,92) electrically connected with the conductive pads by filling the plug contact hole and pad contact hole.
Abstract translation: 目的：提供半导体器件的金属线及其形成方法，以增加导电焊盘和导电图案之间的接触表面，以减少金属线的接触电阻，并通过形成保形导电焊盘来提高信号传输速度。 构成：半导体器件的金属线设置有半导体衬底（100），顺序地沉积在半导体衬底上的第一和第二层间电介质（72,84），形成在第一层间电介质的焊盘接触孔（74） 以及在所述第二层间电介质的所述焊盘接触孔上垂直形成的插塞接触孔（89）。 金属线还包括形成在焊盘接触孔的内壁上以与半导体衬底电连接的导电焊盘（76,78）和通过填充插头接触件与导电焊盘电连接的接触插头（85,92） 孔和垫接触孔。
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公开(公告)号：KR101862547B1
公开(公告)日：2018-05-31
申请号：KR1020120038398
申请日：2012-04-13
Applicant: 삼성전자주식회사
IPC: H01L21/205
CPC classification number: H01L29/66666 , C23C16/24 , H01L21/02381 , H01L21/0245 , H01L21/02488 , H01L21/02494 , H01L21/02532 , H01L21/02576 , H01L21/02579 , H01L21/02595 , H01L21/0262 , H01L21/02639 , H01L21/28525 , H01L21/28556 , H01L21/76876 , H01L21/76877 , H01L27/10888 , H01L27/11582
Abstract: 폴리실리콘막형성방법에있어서, 공정챔버내에로딩된대상체상에질소함유실리콘전구체를도입하여예비씨드층을형성한다. 예비씨드층상에염소함유실리콘전구체를도입하여씨드층을형성한다. 씨드층상에실리콘소스를도입하여폴리실리콘막을형성한다.
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公开(公告)号：KR101840697B1
公开(公告)日：2018-05-04
申请号：KR1020160009493
申请日：2016-01-26
Applicant: 삼성전자주식회사
Inventor： 이원희 , 김종활 , 김진균 , 윤연섭 , 권준석 , 김성재 , 정창우 , 김지홍 , 신문선 , 오승원 , 윤상기 , 이창식 , 정재림 , 천성덕 , 천성현 , 최원석
CPC classification number: F24F1/0014 , F24F1/0003 , F24F1/0029 , F24F1/0033 , F24F13/082 , F24F13/085 , F24F13/10 , F24F13/20 , F24F2001/004
Abstract: 공기조화기는외부패널과, 외부패널에형성된개구를갖는하우징, 하우징의내부로유입되는공기와열교환하는열교환기, 개구를통해공기를토출하는제 1 토출부와, 외부패널을통해공기를토출하는제 2 토출부를갖고, 열교환기와열교환된공기를하우징의외부로토출하는공기토출부를포함하고, 외부패널은, 제 2 토출부가형성되는토출플레이트를포함한다. 토출플레이트를통해열교환된공기를토출할수 있어, 쾌적한공기조화를도모할수 있다.
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