Abstract:
A method of producing an LED hose light includes the steps of mounting a plurality of serially connected LED strings directly on a core tube, using an intermediate tube having embedded power cords for supplying power to the LED strings to enclose the core tube having the LED strings mounted thereon, so as to form an assembly of the core tube, the LED strings, and the intermediate tube, and extending the assembly of the core tube, the LED strings, and the intermediate tube through an outer tube. The LED hose light associating LED strings with the core tube is easily bendable and energy-saving and can be produced at largely reduced cost.
Abstract:
The light source has an LED, preferably produced for the surface-mounting technique, embedded in a transparent material filling. A converter substance is integrated in the filling for the at least partial wavelength conversion of the light emitted by the LED. A lens is glued onto the transparent material filling. The material filling has a convex surface and the lens has a concave underside entering into a form fit with the convex surface of the material filling.
Abstract:
An embodiment of the present invention provides a method of fabricating a cathode requiring relatively few and somewhat simple steps. One embodiment provides a method of fabricating a cathode in which the passivation layer and the metallic gate chromium are masked and patterned simultaneously. The method effectuates patterning of the passivation layer as necessary and simultaneously fixes a location for both access spots and inter-pixel electrical isolation areas to chromium constituting the metallic gate. Importantly, the present implementation effectively eliminates a conventionally requisite subsequent metallic gate chromium masking and etching step. Advantageously, this effectively streamlines and economizes cathode fabrication. The present embodiment thus reduces manufacturing costs and increases the efficiency and productivity of manufacturing lines engaged in cathode fabrication. This effectively reduces the unit cost of flat panel CRTs. In one embodiment, a novel method effectuates fabrication of a cathode by a process requiring relatively few and somewhat simpler steps.
Abstract:
A method of selectively transferring devices arrayed on a first substrate to a second substrate on which an adhesive resin layer is previously formed is disclosed. The method includes steps of selectively heating the adhesive resin layer on the second substrate by laser irradiation from the back surface side of the second substrate, and curing the selectively heated portions of the adhesive resin layer, thereby adhesively bonding those to be transferred of the devices to the second substrate. At this time, portions, corresponding to the devices, of the adhesive layer is heated directly or indirectly via the devices or wiring portions by laser irradiation from the back surface side of the substrate. The heated portions of the adhesive resin layer selectively exhibit the adhesive forces. The heated portions of the adhesive layer are then cured, so that only the devices to be transferred are selectively transferred to the second substrate. As a result, only the devices to be transferred can be certainly, efficiently, and accurately transferred without exerting adverse effect on other parts.
Abstract:
The invention is a method of depositing an aluminum nitride comprising layer over a semiconductor substrate, a method of forming DRAM circuitry, DRAM circuitry, a method of forming a field emission device, and a field emission device. In one aspect, a method of depositing an aluminum nitride comprising layer over a semiconductor substrate includes positioning a semiconductor substrate within a chemical vapor deposition reactor. Ammonia and at least one of triethylaluminum and trimethylaluminum are fed to the reactor while the substrate is at a temperature of about 500null C. or less and at a reactor pressure from about 100 mTorr to about 725 Torr effective to deposit a layer comprising aluminum nitride over the substrate at such temperature and reactor pressure. In one aspect, such layer is utilized as a cell dielectric layer in DRAM circuitry. In one aspect, such layer is deposited over emitters of a field emission display. The invention contemplates DRAM and field emission devices utilizing such layer and alternate layers.
Abstract:
A flat panel display with a black matrix and a fabrication method of the same. The flat panel display has an insulating substrate at the upper part of which a pixel electrode is equipped; an opaque conductive film formed on the front surface of the insulating substrate except at the pixel electrode; an insulating film equipped with a contact hole exposing a portion of the opaque conductive film; and a thin film transistor equipped with a gate electrode, and conductive patterns for source/drain electrodes connected to the opaque conductive film through the contact hole.
Abstract:
A manufacturing apparatus for a PDP includes a unit for forming a protective layer protecting a dielectric layer on a first plate, a unit for baking a phosphor layer applied on a second plate, a unit for sealing the first and second plates arranged so that the protective layer faces the phosphor layer, and a unit for baking the first and second plates while exhausting a space between them. The four units are placed in one or more closed chamber. When the apparatus is driven, spaces in and between the closed chambers each contain a gas atmosphere with vapor partial pressure of 10 mPa or lower, or with a pressure of 1 Pa or lower, where the protective layer and the phosphor layer exhibit less water-absorbing property, preventing degradation of the PDP performances. The protective layer does not contact with atmospheric carbonic acid gas, preventing alteration thereof.
Abstract:
This invention relates to an electrophoretic display comprising isolated cells of well-defined shape, size and aspect ratio which cells are filled with charged pigment particles dispersed in a solvent, a backlight and optionally a background layer. The display may have the traditional up/down switching mode, an in-plane switching mode or a dual switching mode.
Abstract:
A method of fabricating a plasma display panel having a substrate includes the steps of forming an electrode on the substrate, forming a dielectric layer on the substrate including the electrode, forming at least one capillary in the dielectric layer using dry-etching, wherein the capillary and the electrode are separated apart by a portion of the dielectric layer, and sequentially removing the portion of dielectric layer to expose the electrode through the capillary.
Abstract:
A method of forming barrier ribs used in plasma display panels (PDP) is provided. The barrier ribs are formed on a substrate, and the substrate includes a dielectric layer and a rib material layer formed on the dielectric layer. First, a first bottom pattern layer, a second bottom pattern layer and a third bottom pattern layer are formed on the rib material layer. These bottom pattern layers have the same width and are spaced apart to each other with the same distance. Second, a first middle pattern layer, a second middle pattern layer, and a third middle pattern layer are respectively formed above the first bottom pattern layer, the second bottom pattern layer, and the third bottom pattern layer. The left sidewalls of the first middle pattern layer and the first bottom pattern layer are aligned, the right sidewalls of the second middle pattern layer and the second bottom pattern layer are aligned, and the two sidewalls of the third middle pattern layer and the third bottom pattern layer are respectively aligned. Then, a first top pattern layer, and a second top pattern layer are respectively formed above the first middle pattern layer and the third middle pattern layer. The left sidewall of the first top pattern layer and the first middle pattern layer is aligned, and the right sidewall of the second top pattern layer and the third middle pattern layer is aligned. Next, a sandblasting process is performed by using the bottom pattern layers, the middle pattern layers, and the top pattern layers as a mask, parts of the rib material layer is removed to exposed parts of the dielectric layer. Finally, the barrier ribs are completed formed by removing the bottom pattern layers, the middle pattern layers, and the top pattern layers.