Abstract:
A two-stage flash analog-to-digital signal converter is described. The first stage has a voltage divider network and a set of amplifiers that perform an initial interpolation. The initial interpolation results are directly coupled, i.e., no resistive or capacitive elements, to a second stage comprising a set of comparators having multiple inputs. The multiple inputs of the second stage comparators are weightily coupled to the first stage amplifiers in a manner so as to cause the second stage comparators to generate a digital representation of the analog signal.
Abstract:
Est décrit un perfectionnement pour réduire les effets de proximité, consistant à ajouter, dans le motif de masque, des lignes minces appelées barres d'égalisation d'intensité. Ces barres d'égalisation ont pour fonction d'ajuster les gradients d'intensité des bords isolés du motif de masque, afin qu'ils correspondent aux gradients d'intensité des bords très rapprochés. Ces barres d'égalisation sont placées parallèlement aux bords isolés de telle manière que l'égalisation des gradients d'intensité s'effectue sur tous les bords isolés du motif de masque. En outre, les barres d'égalisation sont destinées à présenter une largeur notablement inférieure à la résolution de l'outil de sensibilisation. Par conséquent, lesdites barres qui sont présentes dans le motif de masque produisent des motifs de résist qui disparaissent complètement au dléveloppement lorsqu'une énergie de sensibilisation nominale est utilisée pendant l'exposition du photorésist.
Abstract:
A general purpose processor with four copies of an access unit, with an access instruction fetch queue A-queue (101-104). Each A-queue (101-104) is coupled to an access register file AR (105-108) which is coupled to two access functional units A (109-116). In a typical embodiment, each thread of the processor may have on the order of sixty-four general purpose registers. The access unit functions independently by four simultaneous threads of execution, and each compute control flow by performing arithmetic and branch instructions and access memory by performing load and store instructions. These access units also provide wide specifiers for wide operand instructions. These eight access functional units A (109-116) produce results for access register files (105-108) and memory addresses to a shared memory system (117-120).
Abstract:
A general purpose, programmable media processor (12) for processing and transmitting a media data streams. The media processor (12) incorporates an execution unit (100) that maintains substantially peak data through out of media data streams. The execution unit (100) includes a dynamically partionable multi-precision arithmetic unit (102), programmable switch (104) and programmable extended mathematical element (106). A high bandwidth external interface (124) supplies media data streams at substantially peak rates to a general purpose register file (110) and the execution unit. A memory management unit, and instruction and data cache/buffers (118, 120) are provided. The general purpose, programmable media processor (12) is disposed in a network fabric consisting of fiber optic cable, coaxial cable and twisted pair wires to transmit, process and receive single or unified media data streams.
Abstract:
A general purpose, programmable media processor (12) for processing and transmitting a media data streams. The media processor (12) incorporates an execution unit (100) that maintains substantially peak data through out of media data streams. The execution unit (100) includes a dynamically partionable multi-precision arithmetic unit (102), programmable switch (104) and programmable extended mathematical element (106). A high bandwidth external interface (124) supplies media data streams at substantially peak rates to a general purpose register file (110) and the execution unit. A memory management unit, and instruction and data cache/buffers (118, 120) are provided. The general purpose, programmable media processor (12) is disposed in a network fabric consisting of fiber optic cable, coaxial cable and twisted pair wires to transmit, process and receive single or unified media data streams.
Abstract:
A set-top box for processing streams of media data which comprise a combination of at least two of audio, video, radio, graphics, encryption, authentication, and networking information. The set-top box processes streams of media data and has at least one programmable media processor (12) for receiving, processing and transmitting the stream of media data over the bi-directional communications network. The processor executes group instructions to read a plurality of data elements of the media data stream from a register file (110), to perform, on the data elements, group operations including both group integer and group floating point operations capable of dynamically partitioning the data by each specifying one of a plurality of data element sizes, and to write concatenated results in the register file.
Abstract:
A communication network capable of for processing streams of media data which comprise a combination of at least two of audio, video, radio, graphics, encryption, authentication, and networking information. The communications network processes streams of media data and has at least one programmable media processor (12) for receiving, processing and transmitting the stream of media data over the bi-directional communications network. The processor executes group instructions to read a plurality of data elements of the media data stream from a register file (100), to perform, on the data elements, group operations including both group integer and group floating point operations capable of dynamically partitioning the data by each specifing one of a plurality of data element sizes, and to write concatenated results in the register file. Each media processor (12) is reprogrammable by receiving downloaded software over the network.
Abstract:
A general purpose, programmable media processor (12) for processing and transmitting a media data streams. The media processor (12) incorporates an execution unit (100) that maintains substantially peak data through out of media data streams. The execution unit (100) includes a dynamically partionable multi-precision arithmetic unit (102), programmable switch (104) and programmable extended mathematical element (106). A high bandwidth external interface (124) supplies media data streams at substantially peak rates to a general purpose register file (110) and the execution unit. A memory management unit, and instruction and data cache/buffers (118, 120) are provided. The general purpose, programmable media processor (12) is disposed in a network fabric consisting of fiber optic cable, coaxial cable and twisted pair wires to transmit, process and receive single or unified media data streams.
Abstract:
A general purpose, programmable media processor (12) for processing and transmitting a media data streams. The media processor (12) incorporates an execution unit (100) that maintains substantially peak data through out of media data streams. The execution unit (100) includes a dynamically partionable multi-precision arithmetic unit (102), programmable switch (104) and programmable extended mathematical element (106). A high bandwidth external interface (124) supplies media data streams at substantially peak rates to a general purpose register file (110) and the execution unit. A memory management unit, and instruction and data cache/buffers (118, 120) are provided. The general purpose, programmable media processor (12) is disposed in a network fabric consisting of fiber optic cable, coaxial cable and twisted pair wires to transmit, process and receive single or unified media data streams.
Abstract:
A general purpose, programmable media processor (12) for processing and transmitting a media data streams. The media processor (12) incorporates an execution unit (100) that maintains substantially peak data through out of media data streams. The execution unit (100) includes a dynamically partionable multi-precision arithmetic unit (102), programmable switch (104) and programmable extended mathematical element (106). A high bandwidth external interface (124) supplies media data streams at substantially peak rates to a general purpose register file (110) and the execution unit. A memory management unit, and instruction and data cache/buffers (118, 120) are provided. The general purpose, programmable media processor (12) is disposed in a network fabric consisting of fiber optic cable, coaxial cable and twisted pair wires to transmit, process and receive single or unified media data streams.