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    Method for fabricating semiconductor device
    82.
    发明授权
    Method for fabricating semiconductor device 有权
    制造半导体器件的方法

    公开(公告)号：US09455135B2

    公开(公告)日：2016-09-27

    申请号：US14562768

    申请日：2014-12-07

    Applicant: UNITED MICROELECTRONICS CORP.

    Inventor： Chia-Lin Lu ,  Chun-Lung Chen ,  Kun-Yuan Liao ,  Feng-Yi Chang ,  En-Chiuan Liou ,  Chieh-Te Chen

    IPC: H01L21/302 ,  H01L21/02 ,  H01L21/311 ,  H01L21/033 ,  H01L21/027

    CPC classification number: H01L21/0206 ,  H01L21/02186 ,  H01L21/0276 ,  H01L21/0332 ,  H01L21/0337 ,  H01L21/31138 ,  H01L21/31144 ,  H01L21/76816 ,  H01L21/76897

    Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having at least a gate structure thereon and an interlayer dielectric (ILD) layer around the gate structure; forming a hard mask on the gate structure and the ILD layer; forming a first patterned mask layer on the hard mask; using the first patterned mask layer to remove part of the hard mask for forming a patterned hard mask; and utilizing a gas to strip the first patterned mask layer while forming a protective layer on the patterned hard mask, wherein the gas is selected from the group consisting of N2 and O2.

    Abstract translation: 公开了半导体器件的制造方法。 该方法包括以下步骤：提供其上至少具有栅极结构的衬底和围绕栅极结构的层间电介质（ILD）层; 在栅极结构和ILD层上形成硬掩模; 在硬掩模上形成第一图案化掩模层; 使用第一图案化掩模层去除用于形成图案化硬掩模的硬掩模的一部分; 并且利用气体剥离第一图案化掩模层，同时在图案化的硬掩模上形成保护层，其中气体选自N2和O2。

    Semiconductor device with self-aligned contact and method of manufacturing the same
    84.
    发明授权
    Semiconductor device with self-aligned contact and method of manufacturing the same 有权
    具有自对准接触的半导体器件及其制造方法

    公开(公告)号：US09349812B2

    公开(公告)日：2016-05-24

    申请号：US13902975

    申请日：2013-05-27

    Applicant: UNITED MICROELECTRONICS CORP.

    Inventor： Chieh-Te Chen ,  Feng-Yi Chang ,  Hsuan-Hsu Chen

    IPC: H01L29/417 ,  H01L29/06 ,  H01L21/311 ,  H01L21/768 ,  H01L23/485 ,  H01L29/66

    CPC classification number: H01L29/41775 ,  H01L21/31144 ,  H01L21/76816 ,  H01L21/76897 ,  H01L23/485 ,  H01L29/0692 ,  H01L29/66545 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: A semiconductor device with a self-aligned contact and a method of manufacturing the same, wherein the method comprises the step of forming a 1st dielectric layer on gate structures, form a self-aligned contact trench between two gate structures, forming an 2nd dielectric layer on the 1st dielectric layer and in the self-aligned contact trench; patterning the 2nd dielectric layer into a 1st portion on the 1st dielectric layer and a 2nd portion filling in the self-aligned contact trench, using the 2nd dielectric layer as a mask to etch the 1st dielectric layer, and forming a metal layer and a self-aligned contact simultaneously in the 1st dielectric layer and in the self-aligned contact trench.

    Abstract translation: 具有自对准接触的半导体器件及其制造方法，其中所述方法包括在栅极结构上形成第一介电层的步骤，在两个栅极结构之间形成自对准接触沟槽，形成第二介电层 在第一电介质层和自对准接触沟槽中; 将第二电介质层图案化为第一介电层上的第一部分，并且使用第二介电层作为掩模来蚀刻第一介电层，并形成金属层和自身的第二部分填充在自对准接触沟槽中 在第一电介质层和自对准接触沟槽中同时进行。

    METHOD OF FORMING SEMICONDUCTOR DEVICE
    86.
    发明申请
    METHOD OF FORMING SEMICONDUCTOR DEVICE 有权
    形成半导体器件的方法

    公开(公告)号：US20150325453A1

    公开(公告)日：2015-11-12

    申请号：US14273283

    申请日：2014-05-08

    Applicant: United Microelectronics Corp.

    Inventor： Chia-Lin Lu ,  Chun-Lung Chen ,  Kun-Yuan Liao ,  Feng-Yi Chang ,  Chieh-Te Chen ,  Cheng-Hsing Chuang

    IPC: H01L21/311

    CPC classification number: H01L21/31111 ,  H01L21/31133 ,  H01L21/31144 ,  H01L21/76816 ,  H01L21/76897

    Abstract: A method of forming a semiconductor device is provided. A material layer, a first flowing material layer and a first mask layer are sequentially formed on a substrate. A first etching process is performed by using the first mask layer as a mask, so as to form a first opening in the material layer. The first mask layer and the first flowing material layer are removed. A filler layer is formed in the first opening. A second flowing material layer is formed on the material layer and the filler layer. A second mask layer is formed on the second flowing material layer. A second etching process is performed by using the second mask layer as a mask, so as to form a second opening in the material layer.

    Abstract translation: 提供一种形成半导体器件的方法。 在基板上依次形成材料层，第一流动材料层和第一掩模层。 通过使用第一掩模层作为掩模来进行第一蚀刻工艺，以在材料层中形成第一开口。 去除第一掩模层和第一流动材料层。 在第一开口中形成填充层。 在材料层和填料层上形成第二流动材料层。 在第二流动材料层上形成第二掩模层。 通过使用第二掩模层作为掩模来进行第二蚀刻处理，以在材料层中形成第二开口。

    Manufacturing method for forming a self aligned contact
    87.
    发明授权
    Manufacturing method for forming a self aligned contact 有权
    用于形成自对准接触的制造方法

    公开(公告)号：US08993433B2

    公开(公告)日：2015-03-31

    申请号：US13902977

    申请日：2013-05-27

    Applicant: United Microelectronics Corp.

    Inventor： Chieh-Te Chen ,  Yu-Tsung Lai ,  Hsuan-Hsu Chen ,  Feng-Yi Chang ,  Chih-Sen Huang ,  Ching-Wen Hung

    IPC: H01L21/4763 ,  H01L21/44 ,  H01L21/768

    CPC classification number: H01L21/76816 ,  H01L21/76843 ,  H01L21/76895 ,  H01L21/76897 ,  H01L23/485

    Abstract: The present invention provides a manufacturing method of a semiconductor device, at least containing the following steps: first, a substrate is provided, wherein a first dielectric layer is formed on the substrate, at least one metal gate is formed in the first dielectric layer and at least one source drain region (S/D region) is disposed on two sides of the metal gate, at least one first trench is then formed in the first dielectric layer, exposing parts of the S/D region. The manufacturing method for forming the first trench further includes performing a first photolithography process through a first photomask and performing a second photolithography process through a second photomask, and at least one second trench is formed in the first dielectric layer, exposing parts of the metal gate, and finally, a conductive layer is filled in each first trench and each second trench.

    Abstract translation: 本发明提供一种半导体器件的制造方法，至少包括以下步骤：首先，提供基板，其中在基板上形成第一介电层，在第一介电层中形成至少一个金属栅极， 至少一个源极漏极区域（S / D区域）设置在金属栅极的两侧，然后在第一介电层中形成至少一个第一沟槽，暴露S / D区域的部分。 用于形成第一沟槽的制造方法还包括通过第一光掩模执行第一光刻工艺并通过第二光掩模执行第二光刻工艺，并且在第一电介质层中形成至少一个第二沟槽，暴露部分金属栅极 并且最后，在每个第一沟槽和每个第二沟槽中填充导电层。

    Method for Forming Semiconductor Structure Having Opening
    88.
    发明申请
    Method for Forming Semiconductor Structure Having Opening 审中-公开
    形成具有开口的半导体结构的方法

    公开(公告)号：US20140342553A1

    公开(公告)日：2014-11-20

    申请号：US13893349

    申请日：2013-05-14

    Applicant: UNITED MICROELECTRONICS CORP.

    Inventor： Chieh-Te Chen ,  Feng-Yi Chang ,  Hsuan-Hsu Chen ,  Yu-Tsung Lai ,  Chih-Sen Huang ,  Ching-Wen Hung

    IPC: H01L21/768 ,  H01L21/283

    CPC classification number: H01L21/76897 ,  H01L21/31144 ,  H01L21/76816

    Abstract: According to one embodiment of the present invention, a method for forming a semiconductor structure having an opening is provided. First, a substrate is provided, wherein a first region and a second region are defined on the substrate and an overlapping area of the first region and the second region is defined as a third region. Then, a material layer is formed on the substrate. A first hard mask and a second hard mask are formed on the material layer. The first hard mask in the first region is removed to form a patterned first hard mask. The second hard mask in the third region is removed to form a patterned second hard mask. Lastly, the material layer is patterned by using the patterned second hard mask layer as a mask to form at least an opening in the third region only.

    Abstract translation: 根据本发明的一个实施例，提供一种形成具有开口的半导体结构的方法。 首先，提供衬底，其中在衬底上限定第一区域和第二区域，并且将第一区域和第二区域的重叠区域定义为第三区域。 然后，在基板上形成材料层。 第一硬掩模和第二硬掩模形成在材料层上。 第一区域中的第一硬掩模被去除以形成图案化的第一硬掩模。 去除第三区域中的第二硬掩模以形成图案化的第二硬掩模。 最后，通过使用图案化的第二硬掩模层作为掩模来对材料层进行图案化，以仅在第三区域中形成至少一个开口。

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