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公开(公告)号：WO2002082527A1
公开(公告)日：2002-10-17
申请号：PCT/SG2001/000055
申请日：2001-04-05
Applicant: STMICROELECTRONICS PTE LTD , KHO, Chek, Lim , LOO, Kum, Weng
Inventor： KHO, Chek, Lim , LOO, Kum, Weng
IPC: H01L21/607
CPC classification number: H01L24/85 , H01L23/49575 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/78 , H01L24/83 , H01L2224/05554 , H01L2224/05644 , H01L2224/2919 , H01L2224/32245 , H01L2224/45144 , H01L2224/48091 , H01L2224/48095 , H01L2224/48247 , H01L2224/48471 , H01L2224/48475 , H01L2224/48479 , H01L2224/48644 , H01L2224/49171 , H01L2224/73265 , H01L2224/78301 , H01L2224/8319 , H01L2224/838 , H01L2224/85051 , H01L2224/85186 , H01L2224/85205 , H01L2224/85444 , H01L2224/85986 , H01L2224/92 , H01L2224/92247 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01028 , H01L2924/01043 , H01L2924/01047 , H01L2924/01061 , H01L2924/01079 , H01L2924/01082 , H01L2924/0665 , H01L2924/07802 , H01L2924/10161 , H01L2924/14 , H01L2924/181 , H01L2924/19043 , H01L2924/00 , H01L2224/48227 , H01L2924/00015 , H01L2924/00012 , H01L2224/4554
Abstract: A method of connecting an end of an electrically conductive lead (7) to a surface of an electrically conductive bump (4) formed on a contact of a die, wherein the end is stitch bonded to the surface of the bump (4).
Abstract translation: 将导电引线（7）的端部连接到形成在模具的触点上的导电凸块（4）的表面的方法，其中端部与凸块（4）的表面缝合。
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公开(公告)号：EP2474980B1
公开(公告)日：2019-05-22
申请号：EP11195540.7
申请日：2011-12-23
Applicant: STMicroelectronics Pte Ltd.
Inventor： Le Neel, Olivier , Jimenez, Jean
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3.发明公开Thermo programmable resistor based ROM 审中-公开米特Wärmeprogrammierbarer ROM speicher auf Widerstandsbasis
公开(公告)号：EP2474980A2
公开(公告)日：2012-07-11
申请号：EP11195540.7
申请日：2011-12-23
Applicant: STMicroelectronics Pte Ltd.
Inventor： Le Neel, Olivier , Jimenez, Jean
CPC classification number: G11C13/0069 , G11C11/5692 , G11C17/18 , G11C2013/008 , G11C2213/33 , H01L27/101 , H01L27/1052 , H01L27/2436 , H01L27/2463 , H01L27/2481 , H01L28/20 , H01L45/04 , H01L45/1226 , H01L45/1286 , H01L45/14 , H01L45/148
Abstract: An integrated circuit is formed having an array of memory cells located in the dielectric stack above a semiconductor substrate. Each memory cell has an adjustable resistor and a heating element. A dielectric material separates the heating element from the adjustable resistor. The heating element alters the resistance of the resistor by applying heat thereto. The magnitude of the resistance of the adjustable resistor represents the value of data stored in the memory cell.
Abstract translation: 形成集成电路，其具有位于半导体衬底上方的电介质堆叠中的存储器单元的阵列。 每个存储单元具有可调电阻器和加热元件。 电介质材料将加热元件与可调电阻器分开。 加热元件通过向其施加热量来改变电阻器的电阻。 可调电阻器的电阻的大小表示存储在存储单元中的数据的值。
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4.发明公开Semiconductor device package and method of manufacture 审中-公开VerpackungfürHalbleitervorrichtung und Herstellungsverfahren
公开(公告)号：EP1420458A2
公开(公告)日：2004-05-19
申请号：EP03026134.1
申请日：2003-11-13
Applicant: STMicroelectronics Pte Ltd.
Inventor： Loo, Kum-Weng , Kho, Chek-Lim
IPC: H01L31/0203 , H01L31/0232 , H01L31/024 , G01L9/00
CPC classification number: B81C1/00269 , G01L19/143 , H01L23/04 , H01L23/3135 , H01L23/473 , H01L24/97 , H01L2224/83101 , H01L2924/01005 , H01L2924/01006 , H01L2924/01024 , H01L2924/01027 , H01L2924/01029 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/15787 , H01L2924/181 , H01L2924/00
Abstract: A semiconductor package is disclosed. The package includes a substrate; a semiconductor die attached to the substrate; a housing part attached to the substrate and arranged to surround the semiconductor die; and solidified moulding material arranged around the housing and adhering to the substrate to secure the housing in position on the substrate. A method of manufacturing the package is also disclosed.
Abstract translation: 公开了半导体封装。 所述包装包括基材; 附着在基板上的半导体管芯; 壳体部分，其附接到所述基板并且布置成围绕所述半导体管芯; 以及固化的模制材料，其布置在壳体周围并且粘附到基板上以将壳体固定在基板上的适当位置。 还公开了制造封装的方法。
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公开(公告)号：EP4231361B1
公开(公告)日：2025-04-09
申请号：EP23157224.9
申请日：2023-02-17
Inventor： ENEA, Vincenzo , NGWAN, Voon Cheng
IPC: H01L29/78 , H01L29/417 , H01L21/336 , H01L29/10 , H01L29/40
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Patent Agency Ranking6.发明公开Multi-layer via-less thin film resistor and manufacturing method therefor 审中-公开MehrschichtigerDünnfilmwiderstandohneKontaktlöcherund Herstellungsverfahrendafür
公开(公告)号：EP2423949A2
公开(公告)日：2012-02-29
申请号：EP11178593.7
申请日：2011-08-24
Applicant: STMicroelectronics Pte Ltd.
Inventor： Le Neel, Olivier , Leng, Calvin
IPC: H01L21/02 , H01L23/522 , H01L23/64
CPC classification number: H01L23/5228 , H01L21/76834 , H01L21/76852 , H01L28/20 , H01L28/24 , H01L2221/1078 , H01L2924/0002 , H01L2924/00
Abstract: The present disclosure is directed to a thin film resistor (102) having a first resistor layer (103a) having a first temperature coefficient of resistance and a second resistor layer (103b) on the first resistor layer, the second resistor layer having a second temperature coefficient of resistance different from the first temperature coefficient of resistance. The first temperature coefficient of resistance may be positive while the second temperature coefficient of resistance is negative. The first resistor layer may have a thickness in the range of 5-15 nm and the second resistor layer may have a thickness in the range of 2-5 nm.
Abstract translation: 本公开涉及一种薄膜电阻器（102），其具有第一电阻层（103a）和第二电阻层（103b），第一电阻层（103a）具有第一温度系数电阻，第二电阻层具有第二温度 电阻系数与第一温度系数电阻不同。 电阻的第一温度系数可以为正，而第二温度系数为负。 第一电阻层的厚度可以在5-15nm的范围内，第二电阻层的厚度可以在2-5nm的范围内。
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公开(公告)号：EP1912427B1
公开(公告)日：2009-12-09
申请号：EP06270090.1
申请日：2006-10-13
Applicant: STMicroelectronics (Research & Development) Limited , STMicroelectronics Pte Ltd. , STMICROELECTRONICS SA
Inventor： Brodie, Stuart , McInnes, Hazel , Loo, Kum Weng , Saugier, Eric , Miglietti, Mickael c/o STMicroelectronics SA
CPC classification number: G03B11/00 , H04N5/2257
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公开(公告)号：EP1912427A1
公开(公告)日：2008-04-16
申请号：EP06270090.1
申请日：2006-10-13
Applicant: STMicroelectronics (Research & Development) Limited , STMicroelectronics Pte Ltd. , STMICROELECTRONICS SA
Inventor： Brodie, Stuart , McInnes, Hazel , Loo, Kum Weng , Saugier, Eric , Miglietti, Mickael c/o STMicroelectronics SA
CPC classification number: G03B11/00 , H04N5/2257
Abstract: A camera module lens cap is provided to protect camera modules in mobile devices where the camera modules are exposed. The lens cap has an overhanging lip and a central transparent portion.
Abstract translation: 提供相机模块镜头盖，用于在相机模块暴露的移动设备中保护相机模块。 透镜盖具有突出的唇缘和中心的透明部分。
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公开(公告)号：EP0700191B1
公开(公告)日：2003-07-02
申请号：EP94410072.6
申请日：1994-08-31
Applicant: STMicroelectronics Pte Ltd.
Inventor： Dasgupta, Uday, c/o SGS-Thomson Microelec. Pte Ltd , Ong, Chin Pueh, c/o SGS-Thomson Microelec. Pte Ltd
CPC classification number: H04M1/6025 , H04M1/76
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公开(公告)号：EP0623987B1
公开(公告)日：1999-07-07
申请号：EP94300656.9
申请日：1994-01-28
Applicant: STMicroelectronics Pte Ltd.
Inventor： Yuen, Tang Kong
CPC classification number: H02J1/10 , H02J7/0068 , H02J7/0081 , H02J9/061
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