公开(公告)号：WO2005067155A1

公开(公告)日：2005-07-21

申请号：PCT/US2004/042004

申请日：2004-12-15

Applicant: MICROCHIP TECHNOLOGY INCORPORATED ,  LOURENS, Ruan ,  CHAFFEE, Douglas, LeRoy

Inventor： LOURENS, Ruan ,  CHAFFEE, Douglas, LeRoy

IPC: H04B1/24

CPC classification number: H04B1/24

Abstract: A time signal peripheral may include a radio receiver, decoder/demodulator and time registers. The time signal peripheral may receive, detect and store time information from time signals, e.g ., WWV, WWVH, WWVB (USA), JJY (Japan), MSF (UK) and the like. The time information may be used for a self setting clock, and the clock may be used as a reference in time sensitive applications, devices and systems. A digital processor may be coupled to and control the time signal peripheral. The digital processor may be used to decode the time information in the received time signal, store the decoded time information and make the time information available for use by a device and/or system, or the time signal peripheral may do these functions, allowing the digital processor to be used for higher level applications. The time signal peripheral may be fabricated on an integrated circuit die with or without the digital processor. The time signal peripheral and the digital process may be on a separate integrated circuit dice and be packaged together in a signal integrated circuit package.

Abstract translation: 时间信号外围设备可以包括无线电接收机，解码器/解调器和时间寄存器。 时间信号外围设备可以接收，检测和存储来自时间信号的时间信息，例如WWV，WWVH，WWVB（USA），JJY（Japan），MSF（UK）等。 时间信息可以用于自设置时钟，并且时钟可以用作时间敏感应用，设备和系统中的参考。 数字处理器可以耦合到并控制时间信号外围设备。 数字处理器可以用于解码所接收的时间信号中的时间信息，存储解码的时间信息并使得时间信息可供设备和/或系统使用，或者时间信号外设可以执行这些功能，从而允许 数字处理器用于更高级别的应用。 时间信号外围设备可以在具有或不具有数字处理器的集成电路管芯上制造。 时间信号外围设备和数字处理器可以在单独的集成电路芯片上并且封装在信号集成电路封装中。

公开(公告)号：WO2007048024A3

公开(公告)日：2007-06-07

申请号：PCT/US2006041218

申请日：2006-10-19

Applicant: MICROCHIP TECH INC ,  BRUNDULA STEVEN ,  PYSKA MIKE ,  CHAFFEE DOUGLAS ,  YACH RANDY ,  ALEXANDER SAM

Inventor： BRUNDULA STEVEN ,  PYSKA MIKE ,  CHAFFEE DOUGLAS ,  YACH RANDY ,  ALEXANDER SAM

IPC: G06F12/06

CPC classification number: G06F12/06 ,  G06F12/0638 ,  Y02D10/13

Abstract: An integrated circuit digital processor is coupled to either a main program memory or a secondary program memory, wherein the secondary program memory may be low power, high reliability, non-volatile and/or fast memory that may store a limited number of critical program instructions and data for execution by the digital processor. A program memory switch may couple the digital processor to either the main program memory or the secondary program memory. This is particularly advantageous in that the secondary program memory may have attributes not economically feasible with the main program memory. A program memory controller may handle the selection of which of these memories that the digital processor is using to obtain its program instructions, and necessary control signals for switching and operation thereof.

Abstract translation: 集成电路数字处理器耦合到主程序存储器或辅助程序存储器，其中辅助程序存储器可以是低功率，高可靠性，非易失性和/或快速存储器，其可以存储有限数量的关键程序指令 和由数字处理器执行的数据。 程序存储器开关可以将数字处理器连接到主程序存储器或辅助程序存储器。 这是特别有利的，因为次程序存储器可能具有主程序存储器在经济上不可行的属性。 程序存储器控制器可以处理选择数字处理器正在使用哪些存储器来获得其程序指令以及用于开关和操作的必要控制信号。

公开(公告)号：WO2007048024A2

公开(公告)日：2007-04-26

申请号：PCT/US2006/041218

申请日：2006-10-19

Applicant: MICROCHIP TECHNOLOGY INCORPORATED ,  BRUNDULA, Steven ,  PYSKA, Mike ,  CHAFFEE, Douglas ,  YACH, Randy ,  ALEXANDER, Sam

Inventor： BRUNDULA, Steven ,  PYSKA, Mike ,  CHAFFEE, Douglas ,  YACH, Randy ,  ALEXANDER, Sam

IPC: G06F12/06

CPC classification number: G06F12/06 ,  G06F12/0638 ,  Y02D10/13

Abstract: An integrated circuit digital processor is coupled to either a main program memory or a secondary program memory, wherein the secondary program memory may be low power, high reliability, non-volatile and/or fast memory that may store a limited number of critical program instructions and data for execution by the digital processor. A program memory switch may couple the digital processor to either the main program memory or the secondary program memory. This is particularly advantageous in that the secondary program memory may have attributes not economically feasible with the main program memory. A program memory controller may handle the selection of which of these memories that the digital processor is using to obtain its program instructions, and necessary control signals for switching and operation thereof.

Abstract translation: 集成电路数字处理器耦合到主程序存储器或辅助程序存储器，其中次要程序存储器可以是可以存储有限数量的关键程序指令的低功率，高可靠性，非易失性和/或快速存储器 以及由数字处理器执行的数据。 程序存储器开关可以将数字处理器耦合到主程序存储器或辅助程序存储器。 这是特别有利的，因为次程序存储器可能具有在主程序存储器中经济可行的属性。 程序存储器控制器可以处理数字处理器正在使用的这些存储器中的哪一个的选择以获得其程序指令，以及用于其切换和操作的必要控制信号。