公开(公告)号：JP2009076634A

公开(公告)日：2009-04-09

申请号：JP2007243735

申请日：2007-09-20

Applicant: Kinsus Interconnect Technology Corp ,  景碩科技股▲ふん▼有限公司

Inventor： KYO BUNHITSU ,  YO TOKUSHO

IPC: H01L23/36 ,  H01L23/12

CPC classification number: H01L2224/16225

Abstract: PROBLEM TO BE SOLVED: To provide a double-sided flexible board provided with heat conductive design, for conducting the quantity of heat generated by an attached electron device through a wiring layer and a heat conductive through-hole to a heat radiation layer and preventing the overheating and burning of the electron device. SOLUTION: The double-sided flexible board provided with the heat conductive design includes a substrate 14, the wiring layer 12 and the heat radiation layer 18 provided on both surfaces of the substrate, and the heat conductive through-hole 16 for conducting the wiring layer and the heat radiation layer. A connection pad 12a which can be electrically connected to the electron device 10 is provided in the wiring layer. The electron device can be the driver IC of a liquid crystal display. COPYRIGHT: (C)2009,JPO&INPIT

Abstract translation: 要解决的问题：提供一种具有导热设计的双面柔性板，用于将由附着的电子器件产生的热量通过布线层和导热通孔传导到散热层 并防止电子装置的过热和燃烧。 解决方案：设置有导热设计的双面柔性板包括衬底14，布线层12和设置在衬底的两个表面上的散热层18和用于导电的导热通孔16 布线层和散热层。 在布线层中设置有与电子器件10电连接的连接焊盘12a。 电子器件可以是液晶显示器的驱动器IC。 版权所有（C）2009，JPO＆INPIT

公开(公告)号：JP2008028172A

公开(公告)日：2008-02-07

申请号：JP2006199447

申请日：2006-07-21

Applicant: Kinsus Interconnect Technology Corp ,  景碩科技股▲ふん▼有限公司

Inventor： SHO KINFUKU ,  CHIN KUTAN

IPC: H05K3/00 ,  G01B11/00

Abstract: PROBLEM TO BE SOLVED: To provide a method of positioning a rolled flexible board in an automated manufacturing process.
SOLUTION: The method particularly uses an optical sensor to sense two edges of the rolled flexible board, lateral direction coordinate information, and longitudinal direction coordinate information; precisely forms positioning holes by using the coordinate information items sensed earlier; and uses the positioning holes to precisely determine a start point of a succeeding working area, so that a gap between two working areas is not too large nor too small. In applying a micro-via processing and an image transfer process to the rolled flexible board on the basis of the coordinate information items, the occurrence of deviation and inclination can be avoided.
COPYRIGHT: (C)2008,JPO&INPIT

Abstract translation: 要解决的问题：提供一种在自动化制造过程中定位轧制的柔性板的方法。 解决方案：该方法特别使用光学传感器来感测轧制的柔性板的两个边缘，横向坐标信息和纵向坐标信息; 通过使用先前感测的坐标信息精确地形成定位孔; 并且使用定位孔精确地确定后续工作区域的起始点，使得两个工作区域之间的间隙不会太大也不太小。 在基于坐标信息项目的应用微通孔处理和图像转印处理到轧制的柔性板上时，可以避免出现偏差和倾斜。 版权所有（C）2008，JPO＆INPIT

公开(公告)号：JP2013125770A

公开(公告)日：2013-06-24

申请号：JP2011272217

申请日：2011-12-13

Applicant: Kinsus Interconnect Technology Corp ,  景碩科技股▲ふん▼有限公司

Inventor： LIN TEIKO ,  LU YO DE ,  LU DE HAO ,  CENG AN PING

IPC: H05K3/18 ,  H05K3/00

Abstract: PROBLEM TO BE SOLVED: To provide a thin plate support jig.SOLUTION: A thin plate support jig used for supporting a thin plate according to the present invention includes a main frame, a support underlay material, a coupling body, and at least two elastic supports. The main frame is provided with four side frames so that they surround a hollow area. The support underlay material extends in a hollow area direction from an inner wall of the side frame, and stationary pins are provided on the respective support underlay materials corresponding to stationary holes on the thin plate. The coupling body is provided at a portion of a recess on the side frame. Each elastic support body is fixed by the two coupling bodies, and at least two elastic supports are aligned to cross with each other, and support the thin plate across the hollow area with elasticity. Thereby, utilization efficiency of the entire thin plate is improved, so as to reduce residue of a medicine and scratches, and improve a yield. Also, because a conventional facility is utilized, there is no need of purchasing a new holding tool, and therefore, facility costs are significantly reduced, so as to improve applicability and production efficiency in a manufacturing step, and further equalize a current density during electric plating.

Abstract translation: 要解决的问题：提供薄板支撑夹具。 解决方案：根据本发明的用于支撑薄板的薄板支撑夹具包括主框架，支撑底垫材料，联接体和至少两个弹性支撑件。 主框架设有四个侧框架，使其围绕中空区域。 支撑底垫材料从侧框架的内壁在中空区域方向上延伸，并且固定销设置在对应于薄板上的固定孔的相应的支撑底层材料上。 联接体设置在侧框架上的凹部的一部分。 每个弹性支撑体由两个联接体固定，并且至少两个弹性支撑件对齐以彼此交叉，并且通过弹性将薄板支撑在中空区域上。 由此，能够提高整个薄板的利用效率，减少药物的残留和划痕，提高产率。 此外，由于利用了常规设备，因此不需要购买新的保持工具，因此，显着降低设备成本，从而提高制造步骤中的适用性和生产效率，并且进一步均衡电气中的电流密度 电镀。 版权所有（C）2013，JPO＆INPIT

公开(公告)号：JP2008305952A

公开(公告)日：2008-12-18

申请号：JP2007151463

申请日：2007-06-07

Applicant: Kinsus Interconnect Technology Corp ,  景碩科技股▲ふん▼有限公司

Inventor： CHANG CHIEN-WEI ,  LIN TEIKO

IPC: H05K3/20 ,  H01L25/065 ,  H01L25/07 ,  H01L25/18 ,  H05K3/46

CPC classification number: H01L2224/48091 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: PROBLEM TO BE SOLVED: To provide a high density fine line mounting structure and manufacturing method of the same. SOLUTION: Two plate materials that are similar in the structure are included and the two plate materials are combined with a dielectric resin film. After combination, semiconductor elements in the two plate materials are respectively located in the opposite sides. These two plate materials are respectively constituted with an ultra-fine line circuit layer, an insulating layer provided on the same flat surface, and the semiconductor element provided on the ultra-fine line circuit layer. A part not shielded by solder mask bottom in the ultra-fine line circuit layer of the two plate materials is filled with a solder ball as the continuous connection pad or is electrically connected continuously with another semiconductor element by utilizing the solder ball. In this structure, in view of forming the ultra-fine line circuit layer with an electrolytic plating process without use of the etching means, a carrier body and a metal shielding layer required to form the ultra-fine line circuit layer are removed during the manufacturing process or at the ending time of manufacturing process. As described above a layout space can be enlarged to realize high density structure. COPYRIGHT: (C)2009,JPO&INPIT

Abstract translation: 要解决的问题：提供高密度细线安装结构及其制造方法。

解决方案：包括两种结构相似的板材，两块板材与介电树脂膜组合。 在组合之后，两个板材中的半导体元件分别位于相对的两侧。 这两个板材分别由超细线电路层，设置在同一平面上的绝缘层和设置在超细线电路层上的半导体元件构成。 在两个板材的超细线路电路层中未被焊接掩模底部屏蔽的部分填充有作为连续连接焊盘的焊球，或者通过利用焊球与另一个半导体元件电连接。 在这种结构中，考虑到在不使用蚀刻装置的情况下通过电解电镀工艺形成超细线电路层，在制造过程中除去形成超细线电路层所需的载体和金属屏蔽层 过程或制造过程的结束时间。 如上所述，可以扩大布局空间以实现高密度结构。 版权所有（C）2009，JPO＆INPIT

公开(公告)号：JP2008305976A

公开(公告)日：2008-12-18

申请号：JP2007151777

申请日：2007-06-07

Applicant: Kinsus Interconnect Technology Corp ,  景碩科技股▲ふん▼有限公司

Inventor： CHANG CHIEN-WEI ,  LIN TEIKO

IPC: H01L25/00 ,  H01L23/52

CPC classification number: H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19105 ,  H01L2924/3025 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: PROBLEM TO BE SOLVED: To provide a high density thin line mounting structure and a manufacturing method of the structure.
SOLUTION: The high density thin line mounting structure is provided with a first semiconductor element arranged on a super-thin line circuit layer, an insulating layer on a phase identification plane, an outer layer circuit layer above the first semiconductor element and a solder mask bottom on the outer layer circuit layer. The solder mask bottom is set to be a connection pad, and it can electrically be connected to a second semiconductor element. The exposed super-fine line circuit layer is set to be a solder ball pad with which a solder ball is filled. In the method, the super-thin line circuit layer can be formed by electrolytic plating without depending on an etching means, and a carrier object and a metal avoiding layer, which are required for forming the super-thin line circuit layer, are removed during a manufacture process or when it is terminated. A space of layout is enlarged and a purpose of high density is realized.
COPYRIGHT: (C)2009,JPO&INPIT

Abstract translation: 要解决的问题：提供一种高密度细线安装结构和该结构的制造方法。 解决方案：高密度细线安装结构设置有布置在超薄线路电路层上的第一半导体元件，相位识别平面上的绝缘层，第一半导体元件上方的外层电路层和 焊锡掩模底部在外层电路层上。 焊接掩模底部设置为连接焊盘，并且其可以电连接到第二半导体元件。 曝光的超细线电路层被设置为焊球，填充焊球。 在该方法中，可以通过电解电镀而不依赖于蚀刻装置形成超细线电路层，并且在超薄线路电路层形成时需要的载体和金属避免层被去除 制造过程或何时终止。 扩大了布局空间，实现了高密度化的目的。 版权所有（C）2009，JPO＆INPIT

公开(公告)号：JP2008292305A

公开(公告)日：2008-12-04

申请号：JP2007138088

申请日：2007-05-24

Applicant: Kinsus Interconnect Technology Corp ,  景碩科技股▲ふん▼有限公司

Inventor： KYO BUNHITSU

IPC: G01R31/02 ,  H05K3/00

Abstract: PROBLEM TO BE SOLVED: To provide an electrical inspection system, smoothly performing electrical inspection for a both-sided board.
SOLUTION: This electrical inspection system includes an inspection board which can come into electrical contact with a circuit board, a support plate for supporting the inspection board and the circuit board, a plurality of test probes for outputting an electrical signal, and a sensor for receiving an electrical signal through the circuit board and the inspection board. When a printed circuit board is placed on the inspection board, an electrical signal is output one by one by the plurality of test probes and is transmitted to the printed circuit board through the inspection board to determine whether an end point on the printed circuit board facing the test probe is open-circuited or short-circuited, based on whether the sensor is receiving an electrical signal.
COPYRIGHT: (C)2009,JPO&INPIT

Abstract translation: 要解决的问题：为了提供电气检查系统，平滑地执行双面板的电气检查。

解决方案：该电气检查系统包括可与电路板电接触的检查板，用于支撑检查板和电路板的支撑板，用于输出电信号的多个测试探针，以及 用于通过电路板和检查板接收电信号的传感器。 当印刷电路板放置在检查板上时，多个测试探针一个接一个地输出电信号，并通过检查板传送到印刷电路板，以确定印刷电路板上的端点是否面向 基于传感器是否接收到电信号，测试探头是开路或短路的。 版权所有（C）2009，JPO＆INPIT

公开(公告)号：JP2008288422A

公开(公告)日：2008-11-27

申请号：JP2007132752

申请日：2007-05-18

Applicant: Kinsus Interconnect Technology Corp ,  景碩科技股▲ふん▼有限公司

Inventor： YO TOKUSHO

IPC: H05K3/00 ,  H05K1/02

Abstract: PROBLEM TO BE SOLVED: To provide a flexible printed wiring board (FPC) and a manufacturing method thereof.
SOLUTION: In the flexible printed wiring board and the manufacturing method thereof, the wiring board is mainly constituted of a polyimide (PI) substrate 10 with a circuit layer 12 and a polyimide substrate 14 formed by pressing an adhesive 16 on a polyimide board. In the invention, a method for etching a polyimide board is employed for conductively connecting the circuit layer 12 on a polyimide board, and a precision fine continuity hole 18 is formed on the circuit layer 12. A method wherein a continuity hole is subjected to punch processing in advance on a polyimide substrate for pressing it on a polyimide board is not employed. Consequently, a mold cost is cut and position accuracy in relation to a circuit layer of a continuity hole is raised simultaneously.
COPYRIGHT: (C)2009,JPO&INPIT

Abstract translation: 要解决的问题：提供一种柔性印刷线路板（FPC）及其制造方法。 解决方案：在柔性印刷电路板及其制造方法中，布线板主要由具有电路层12的聚酰亚胺（PI）基板10和通过在聚酰亚胺上压制粘合剂16而形成的聚酰亚胺基板14构成。 板。 在本发明中，采用了用于导电性地连接聚酰亚胺板上的电路层12的方法，在电路层12上形成精密的细导电孔18。 预先在聚酰亚胺基板上进行加工以将其压在聚酰亚胺板上。 因此，切断模具成本并且同时提高与连续孔的电路层相关的位置精度。 版权所有（C）2009，JPO＆INPIT

公开(公告)号：JP2008023916A

公开(公告)日：2008-02-07

申请号：JP2006201175

申请日：2006-07-24

Applicant: Kinsus Interconnect Technology Corp ,  景碩科技股▲ふん▼有限公司

Inventor： SHO KINFUKU ,  CHIN KUTO

IPC: B29C59/16 ,  B23K26/16 ,  B23K26/38 ,  B23K101/42 ,  B29L7/00 ,  B29L31/34 ,  H05K3/00

Abstract: PROBLEM TO BE SOLVED: To provide a roll-film body-patterning method in an automated production process characterized by sticking carbonaceous residues or flakes generated by laser via to prevent foreign matters or the like from falling onto a roll-film body or to prevent the contamination thereof by other reasons. SOLUTION: The method includes the sticking of the roll-film body to a support plate with a slightly-viscous adhesive, and that of the carbonaceous residue or flake generated when patterning the roll-film body by laser beam onto the above support plate. Thereby, no carbonaceous residue or flake falls on a part of the roll-film body in the automated production process and thus, the method needs no cleaning. COPYRIGHT: (C)2008,JPO&INPIT

Abstract translation: 要解决的问题：提供一种自动化生产过程中的卷膜体图案化方法，其特征在于粘附由激光通孔产生的碳质残渣或薄片，以防止异物等落在卷膜体上或 以防其它原因造成污染。 解决方案：该方法包括将卷膜体粘附到具有轻微粘稠粘合剂的支撑板上，并且通过激光束将辊状体图案化到上述支撑体上时产生的碳质残渣或片状物 盘子。 因此，在自动化生产过程中，没有碳质残渣或薄片落在辊膜体的一部分上，因此该方法不需要清洁。 版权所有（C）2008，JPO＆INPIT

公开(公告)号：US20250079333A1

公开(公告)日：2025-03-06

申请号：US18390626

申请日：2023-12-20

Applicant: KINSUS INTERCONNECT TECHNOLOGY CORP.

Inventor： Ting-Hao LIN ,  Chiao-Cheng CHANG ,  Chien-Wei CHANG

IPC: H01L23/00 ,  H01L23/498

Abstract: An anti-warpage reinforced carrier includes a substrate, a plurality of rigid insulating plates, a plurality of metal posts, a resin layer, a first circuit layer, and a second circuit layer. The rigid insulating plates are arranged on the positioning areas on the substrate. The metal posts are in the second through holes penetrating through the rigid insulating plate. The resin layer covers the rigid insulating plates and the upper surface of the substrate, and includes a plurality of openings. The first circuit layer is on the resin layer and in the openings, and is connected to the metal posts. The second circuit layer is on a lower surface of the substrate and in the first through holes penetrating through the substrate, and is connected to the metal posts. By embedding rigid insulating plates therein, the anti-warpage reinforced carrier provides thermal stability, and is suitable for applications in advanced chip packaging.

公开(公告)号：US10779418B2

公开(公告)日：2020-09-15

申请号：US16555261

申请日：2019-08-29

Applicant: Kinsus Interconnect Technology Corp.

Inventor： Ting-Hao Lin ,  Chiao-Cheng Chang ,  Yi-Nong Lin

IPC: H01K3/10 ,  H05K3/42 ,  H05K1/02 ,  H05K1/11 ,  H05K3/00 ,  H05K3/46

Abstract: A manufacturing method of a double layer circuit board comprises forming a connecting pillar on a first circuit, wherein the connecting pillar comprises a first end, connected to the first circuit, and a second end, opposite to the first end; forming a substrate on the first circuit and the connecting pillar; drilling the substrate to expose a portion of the second end of the connecting pillar, wherein the other portion of the second end of the connecting pillar is covered by the substrate; and forming a second circuit on the substrate and the portion of the second end of the connecting pillar, wherein an area of the first end connected to the first circuit layer is greater than an area of the portion of the second end connected to the second circuit layer.