公开(公告)号：US20250079333A1

公开(公告)日：2025-03-06

申请号：US18390626

申请日：2023-12-20

Applicant: KINSUS INTERCONNECT TECHNOLOGY CORP.

Inventor： Ting-Hao LIN ,  Chiao-Cheng CHANG ,  Chien-Wei CHANG

IPC: H01L23/00 ,  H01L23/498

Abstract: An anti-warpage reinforced carrier includes a substrate, a plurality of rigid insulating plates, a plurality of metal posts, a resin layer, a first circuit layer, and a second circuit layer. The rigid insulating plates are arranged on the positioning areas on the substrate. The metal posts are in the second through holes penetrating through the rigid insulating plate. The resin layer covers the rigid insulating plates and the upper surface of the substrate, and includes a plurality of openings. The first circuit layer is on the resin layer and in the openings, and is connected to the metal posts. The second circuit layer is on a lower surface of the substrate and in the first through holes penetrating through the substrate, and is connected to the metal posts. By embedding rigid insulating plates therein, the anti-warpage reinforced carrier provides thermal stability, and is suitable for applications in advanced chip packaging.

公开(公告)号：US20170311443A1

公开(公告)日：2017-10-26

申请号：US15138261

申请日：2016-04-26

Applicant: Kinsus Interconnect Technology Corp.

Inventor： Ting-Hao LIN ,  Chiao-Cheng Chang ,  Yi-Nong Lin

IPC: H05K1/02 ,  H05K3/10 ,  H05K3/42 ,  H05K3/46

CPC classification number: H05K3/42 ,  H05K1/0284 ,  H05K1/0296 ,  H05K1/112 ,  H05K3/007 ,  H05K3/4647 ,  H05K2201/0376 ,  H05K2203/0733 ,  H05K2203/1476 ,  Y10T29/49165

Abstract: Provided is a double layer circuit board and a manufacturing method thereof. The double layer circuit board comprises a substrate, a first circuit layer formed on a first surface of the substrate, a second circuit layer formed on a second surface of the substrate, and at least one connecting pillar formed in and covered by the substrate. Each one of the at least one connecting pillar includes a first end connected to the first circuit layer and a second end connected to the second circuit layer. A terminal area of the second end is greater than a terminal area of the first end. Therefore, the second circuit layer is firmly connected to the first circuit layer through the at least one connecting pillar. A yield rate of the double layer circuit board may be increased.

公开(公告)号：US20200136233A1

公开(公告)日：2020-04-30

申请号：US16175807

申请日：2018-10-30

Applicant: Kinsus Interconnect Technology Corp.

Inventor： Ting-Hao LIN ,  Yung-Lin CHIA ,  Chiao-Cheng CHANG

IPC: H01Q1/22 ,  H05K1/11 ,  H05K1/14 ,  H05K1/18 ,  H01Q1/52

Abstract: An antenna carrier plate structure has a first circuit board and a second circuit board. The first circuit board has a first substrate and a conductive connector disposed in the first substrate. The conductive connector has two opposite connecting ends respectively protruding from two opposite surfaces of the first substrate. The second circuit board has a second substrate formed with a through hole, and a connecting plug is disposed in the through hole. One end of the connecting plug is formed with an engaging concave portion for engaging one end of the conductive connector of the first substrate. Therefore, each circuit board can be firmly fixed and electrically connected by engaging to form a multi-layer circuit board module, thereby avoiding joint tolerances during soldering and ensuring a correct connection of the joints.

公开(公告)号：US20180160533A1

公开(公告)日：2018-06-07

申请号：US15369822

申请日：2016-12-05

Applicant: KINSUS INTERCONNECT TECHNOLOGY CORP.

Inventor： Ting-Hao LIN ,  Chiao-Cheng CHANG ,  Yi-Nong LIN

IPC: H05K1/14 ,  H05K1/02 ,  H05K3/36 ,  H05K3/46

CPC classification number: H05K3/4641 ,  H05K3/4647 ,  H05K3/4682 ,  H05K2201/10242 ,  H05K2203/041 ,  H05K2203/0568

Abstract: A multilayer printed circuit board includes a first circuit board, a second circuit board and bonding films. The first circuit board includes a first dielectric layer, a first wiring pattern layer, a plurality of conductive blocks and a plurality of solder balls. The first wiring pattern layer is formed on a first surface of the first dielectric layer and the conductive blocks are formed on a second surface of the first dielectric layer. The solder balls are formed on a surface of the first wiring pattern layer. The second circuit board includes a second dielectric layer, a second wiring pattern layer, second conductive blocks and conductive pillars. The second wiring pattern layer is formed on a third surface of the second dielectric layer and the second conductive blocks are formed on a fourth surface thereof. The conductive pillars are formed on the second wiring pattern layer.

公开(公告)号：US20180332706A1

公开(公告)日：2018-11-15

申请号：US16045236

申请日：2018-07-25

Applicant: KINSUS INTERCONNECT TECHNOLOGY CORP.

Inventor： Ting-Hao LIN ,  Chiao-Cheng CHANG ,  Yi-Nong LIN

IPC: H05K1/11 ,  H05K3/00 ,  H05K3/46 ,  H05K3/42 ,  H05K3/18 ,  H05K3/10

Abstract: A landless multilayer circuit board includes a first substrate, a first circuit, at least one connecting pillar, a second substrate, and a second circuit. The second substrate is on the surface of the first substrate, covering the first circuit, and exposing at least one top of the at least one connecting pillar exposed out of a surface of the second substrate, wherein an area of a portion of the at least one connecting pillar that is exposed out of the surface of the second substrate is greater than an area of a portion of the at least one connecting pillar that is connected to the first circuit. The second circuit is on the surface of the second substrate and the at least one connecting pillar, and connected to the portion of the at least one connecting pillar that is exposed out of the surface of the second substrate.

公开(公告)号：US20170303397A1

公开(公告)日：2017-10-19

申请号：US15130724

申请日：2016-04-15

Applicant: Kinsus Interconnect Technology Corp.

Inventor： Ting-Hao LIN ,  Chiao-Cheng CHANG ,  Yi-Nong LIN

IPC: H05K1/11 ,  H05K3/42 ,  H05K3/18 ,  H05K3/00 ,  H05K3/46

CPC classification number: H05K1/115 ,  H05K1/113 ,  H05K3/0047 ,  H05K3/0079 ,  H05K3/0094 ,  H05K3/108 ,  H05K3/18 ,  H05K3/429 ,  H05K3/4644 ,  H05K3/4647 ,  H05K2203/054 ,  Y10T29/49165

Abstract: Provided is a landless multilayer circuit board and a manufacturing method thereof. The manufacturing method includes steps of forming a first circuit on a first substrate, patterning a photoresist layer to form at least one via between the first circuit and a second circuit, forming at least one connecting pillar in the at least one via, removing the photoresist layer, forming a second substrate to cover the at least one connect pillar, and forming the second circuit on the second substrate. The second circuit is connected to the first circuit through the at least one connecting pillar. When the second circuit is formed, the at least one via does not need to be filled, thereby making the second circuit flat.